1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_S390_PCI_DMA_H
3#define _ASM_S390_PCI_DMA_H
4
5/* I/O Translation Anchor (IOTA) */
6enum zpci_ioat_dtype {
7	ZPCI_IOTA_STO = 0,
8	ZPCI_IOTA_RTTO = 1,
9	ZPCI_IOTA_RSTO = 2,
10	ZPCI_IOTA_RFTO = 3,
11	ZPCI_IOTA_PFAA = 4,
12	ZPCI_IOTA_IOPFAA = 5,
13	ZPCI_IOTA_IOPTO = 7
14};
15
16#define ZPCI_IOTA_IOT_ENABLED		0x800UL
17#define ZPCI_IOTA_DT_ST			(ZPCI_IOTA_STO	<< 2)
18#define ZPCI_IOTA_DT_RT			(ZPCI_IOTA_RTTO << 2)
19#define ZPCI_IOTA_DT_RS			(ZPCI_IOTA_RSTO << 2)
20#define ZPCI_IOTA_DT_RF			(ZPCI_IOTA_RFTO << 2)
21#define ZPCI_IOTA_DT_PF			(ZPCI_IOTA_PFAA << 2)
22#define ZPCI_IOTA_FS_4K			0
23#define ZPCI_IOTA_FS_1M			1
24#define ZPCI_IOTA_FS_2G			2
25#define ZPCI_KEY			(PAGE_DEFAULT_KEY << 5)
26
27#define ZPCI_TABLE_SIZE_RT	(1UL << 42)
28
29#define ZPCI_IOTA_STO_FLAG	(ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_ST)
30#define ZPCI_IOTA_RTTO_FLAG	(ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_RT)
31#define ZPCI_IOTA_RSTO_FLAG	(ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_RS)
32#define ZPCI_IOTA_RFTO_FLAG	(ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_RF)
33#define ZPCI_IOTA_RFAA_FLAG	(ZPCI_IOTA_IOT_ENABLED | ZPCI_KEY | ZPCI_IOTA_DT_PF | ZPCI_IOTA_FS_2G)
34
35/* I/O Region and segment tables */
36#define ZPCI_INDEX_MASK			0x7ffUL
37
38#define ZPCI_TABLE_TYPE_MASK		0xc
39#define ZPCI_TABLE_TYPE_RFX		0xc
40#define ZPCI_TABLE_TYPE_RSX		0x8
41#define ZPCI_TABLE_TYPE_RTX		0x4
42#define ZPCI_TABLE_TYPE_SX		0x0
43
44#define ZPCI_TABLE_LEN_RFX		0x3
45#define ZPCI_TABLE_LEN_RSX		0x3
46#define ZPCI_TABLE_LEN_RTX		0x3
47
48#define ZPCI_TABLE_OFFSET_MASK		0xc0
49#define ZPCI_TABLE_SIZE			0x4000
50#define ZPCI_TABLE_ALIGN		ZPCI_TABLE_SIZE
51#define ZPCI_TABLE_ENTRY_SIZE		(sizeof(unsigned long))
52#define ZPCI_TABLE_ENTRIES		(ZPCI_TABLE_SIZE / ZPCI_TABLE_ENTRY_SIZE)
53
54#define ZPCI_TABLE_BITS			11
55#define ZPCI_PT_BITS			8
56#define ZPCI_ST_SHIFT			(ZPCI_PT_BITS + PAGE_SHIFT)
57#define ZPCI_RT_SHIFT			(ZPCI_ST_SHIFT + ZPCI_TABLE_BITS)
58
59#define ZPCI_RTE_FLAG_MASK		0x3fffUL
60#define ZPCI_RTE_ADDR_MASK		(~ZPCI_RTE_FLAG_MASK)
61#define ZPCI_STE_FLAG_MASK		0x7ffUL
62#define ZPCI_STE_ADDR_MASK		(~ZPCI_STE_FLAG_MASK)
63
64/* I/O Page tables */
65#define ZPCI_PTE_VALID_MASK		0x400
66#define ZPCI_PTE_INVALID		0x400
67#define ZPCI_PTE_VALID			0x000
68#define ZPCI_PT_SIZE			0x800
69#define ZPCI_PT_ALIGN			ZPCI_PT_SIZE
70#define ZPCI_PT_ENTRIES			(ZPCI_PT_SIZE / ZPCI_TABLE_ENTRY_SIZE)
71#define ZPCI_PT_MASK			(ZPCI_PT_ENTRIES - 1)
72
73#define ZPCI_PTE_FLAG_MASK		0xfffUL
74#define ZPCI_PTE_ADDR_MASK		(~ZPCI_PTE_FLAG_MASK)
75
76/* Shared bits */
77#define ZPCI_TABLE_VALID		0x00
78#define ZPCI_TABLE_INVALID		0x20
79#define ZPCI_TABLE_PROTECTED		0x200
80#define ZPCI_TABLE_UNPROTECTED		0x000
81
82#define ZPCI_TABLE_VALID_MASK		0x20
83#define ZPCI_TABLE_PROT_MASK		0x200
84
85static inline unsigned int calc_rtx(dma_addr_t ptr)
86{
87	return ((unsigned long) ptr >> ZPCI_RT_SHIFT) & ZPCI_INDEX_MASK;
88}
89
90static inline unsigned int calc_sx(dma_addr_t ptr)
91{
92	return ((unsigned long) ptr >> ZPCI_ST_SHIFT) & ZPCI_INDEX_MASK;
93}
94
95static inline unsigned int calc_px(dma_addr_t ptr)
96{
97	return ((unsigned long) ptr >> PAGE_SHIFT) & ZPCI_PT_MASK;
98}
99
100static inline void set_pt_pfaa(unsigned long *entry, phys_addr_t pfaa)
101{
102	*entry &= ZPCI_PTE_FLAG_MASK;
103	*entry |= (pfaa & ZPCI_PTE_ADDR_MASK);
104}
105
106static inline void set_rt_sto(unsigned long *entry, phys_addr_t sto)
107{
108	*entry &= ZPCI_RTE_FLAG_MASK;
109	*entry |= (sto & ZPCI_RTE_ADDR_MASK);
110	*entry |= ZPCI_TABLE_TYPE_RTX;
111}
112
113static inline void set_st_pto(unsigned long *entry, phys_addr_t pto)
114{
115	*entry &= ZPCI_STE_FLAG_MASK;
116	*entry |= (pto & ZPCI_STE_ADDR_MASK);
117	*entry |= ZPCI_TABLE_TYPE_SX;
118}
119
120static inline void validate_rt_entry(unsigned long *entry)
121{
122	*entry &= ~ZPCI_TABLE_VALID_MASK;
123	*entry &= ~ZPCI_TABLE_OFFSET_MASK;
124	*entry |= ZPCI_TABLE_VALID;
125	*entry |= ZPCI_TABLE_LEN_RTX;
126}
127
128static inline void validate_st_entry(unsigned long *entry)
129{
130	*entry &= ~ZPCI_TABLE_VALID_MASK;
131	*entry |= ZPCI_TABLE_VALID;
132}
133
134static inline void invalidate_pt_entry(unsigned long *entry)
135{
136	WARN_ON_ONCE((*entry & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_INVALID);
137	*entry &= ~ZPCI_PTE_VALID_MASK;
138	*entry |= ZPCI_PTE_INVALID;
139}
140
141static inline void validate_pt_entry(unsigned long *entry)
142{
143	WARN_ON_ONCE((*entry & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_VALID);
144	*entry &= ~ZPCI_PTE_VALID_MASK;
145	*entry |= ZPCI_PTE_VALID;
146}
147
148static inline void entry_set_protected(unsigned long *entry)
149{
150	*entry &= ~ZPCI_TABLE_PROT_MASK;
151	*entry |= ZPCI_TABLE_PROTECTED;
152}
153
154static inline void entry_clr_protected(unsigned long *entry)
155{
156	*entry &= ~ZPCI_TABLE_PROT_MASK;
157	*entry |= ZPCI_TABLE_UNPROTECTED;
158}
159
160static inline int reg_entry_isvalid(unsigned long entry)
161{
162	return (entry & ZPCI_TABLE_VALID_MASK) == ZPCI_TABLE_VALID;
163}
164
165static inline int pt_entry_isvalid(unsigned long entry)
166{
167	return (entry & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_VALID;
168}
169
170static inline unsigned long *get_rt_sto(unsigned long entry)
171{
172	if ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_RTX)
173		return phys_to_virt(entry & ZPCI_RTE_ADDR_MASK);
174	else
175		return NULL;
176
177}
178
179static inline unsigned long *get_st_pto(unsigned long entry)
180{
181	if ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_SX)
182		return phys_to_virt(entry & ZPCI_STE_ADDR_MASK);
183	else
184		return NULL;
185}
186
187/* Prototypes */
188void dma_free_seg_table(unsigned long);
189unsigned long *dma_alloc_cpu_table(gfp_t gfp);
190void dma_cleanup_tables(unsigned long *);
191unsigned long *dma_walk_cpu_trans(unsigned long *rto, dma_addr_t dma_addr,
192				  gfp_t gfp);
193void dma_update_cpu_trans(unsigned long *entry, phys_addr_t page_addr, int flags);
194
195extern const struct dma_map_ops s390_pci_dma_ops;
196
197
198#endif
199