162306a36Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0 262306a36Sopenharmony_cimenu "Platform support" 362306a36Sopenharmony_ci 462306a36Sopenharmony_cisource "arch/powerpc/platforms/powernv/Kconfig" 562306a36Sopenharmony_cisource "arch/powerpc/platforms/pseries/Kconfig" 662306a36Sopenharmony_cisource "arch/powerpc/platforms/chrp/Kconfig" 762306a36Sopenharmony_cisource "arch/powerpc/platforms/512x/Kconfig" 862306a36Sopenharmony_cisource "arch/powerpc/platforms/52xx/Kconfig" 962306a36Sopenharmony_cisource "arch/powerpc/platforms/powermac/Kconfig" 1062306a36Sopenharmony_cisource "arch/powerpc/platforms/maple/Kconfig" 1162306a36Sopenharmony_cisource "arch/powerpc/platforms/pasemi/Kconfig" 1262306a36Sopenharmony_cisource "arch/powerpc/platforms/ps3/Kconfig" 1362306a36Sopenharmony_cisource "arch/powerpc/platforms/cell/Kconfig" 1462306a36Sopenharmony_cisource "arch/powerpc/platforms/8xx/Kconfig" 1562306a36Sopenharmony_cisource "arch/powerpc/platforms/82xx/Kconfig" 1662306a36Sopenharmony_cisource "arch/powerpc/platforms/83xx/Kconfig" 1762306a36Sopenharmony_cisource "arch/powerpc/platforms/85xx/Kconfig" 1862306a36Sopenharmony_cisource "arch/powerpc/platforms/86xx/Kconfig" 1962306a36Sopenharmony_cisource "arch/powerpc/platforms/embedded6xx/Kconfig" 2062306a36Sopenharmony_cisource "arch/powerpc/platforms/44x/Kconfig" 2162306a36Sopenharmony_cisource "arch/powerpc/platforms/40x/Kconfig" 2262306a36Sopenharmony_cisource "arch/powerpc/platforms/amigaone/Kconfig" 2362306a36Sopenharmony_cisource "arch/powerpc/platforms/book3s/Kconfig" 2462306a36Sopenharmony_cisource "arch/powerpc/platforms/microwatt/Kconfig" 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ciconfig KVM_GUEST 2762306a36Sopenharmony_ci bool "KVM Guest support" 2862306a36Sopenharmony_ci select EPAPR_PARAVIRT 2962306a36Sopenharmony_ci help 3062306a36Sopenharmony_ci This option enables various optimizations for running under the KVM 3162306a36Sopenharmony_ci hypervisor. Overhead for the kernel when not running inside KVM should 3262306a36Sopenharmony_ci be minimal. 3362306a36Sopenharmony_ci 3462306a36Sopenharmony_ci In case of doubt, say Y 3562306a36Sopenharmony_ci 3662306a36Sopenharmony_ciconfig EPAPR_PARAVIRT 3762306a36Sopenharmony_ci bool "ePAPR para-virtualization support" 3862306a36Sopenharmony_ci help 3962306a36Sopenharmony_ci Enables ePAPR para-virtualization support for guests. 4062306a36Sopenharmony_ci 4162306a36Sopenharmony_ci In case of doubt, say Y 4262306a36Sopenharmony_ci 4362306a36Sopenharmony_ciconfig PPC_HASH_MMU_NATIVE 4462306a36Sopenharmony_ci bool 4562306a36Sopenharmony_ci depends on PPC_BOOK3S 4662306a36Sopenharmony_ci help 4762306a36Sopenharmony_ci Support for running natively on the hardware, i.e. without 4862306a36Sopenharmony_ci a hypervisor. This option is not user-selectable but should 4962306a36Sopenharmony_ci be selected by all platforms that need it. 5062306a36Sopenharmony_ci 5162306a36Sopenharmony_ciconfig PPC_OF_BOOT_TRAMPOLINE 5262306a36Sopenharmony_ci bool "Support booting from Open Firmware or yaboot" 5362306a36Sopenharmony_ci depends on PPC_BOOK3S_32 || PPC64 5462306a36Sopenharmony_ci select RELOCATABLE if PPC64 5562306a36Sopenharmony_ci default y 5662306a36Sopenharmony_ci help 5762306a36Sopenharmony_ci Support from booting from Open Firmware or yaboot using an 5862306a36Sopenharmony_ci Open Firmware client interface. This enables the kernel to 5962306a36Sopenharmony_ci communicate with open firmware to retrieve system information 6062306a36Sopenharmony_ci such as the device tree. 6162306a36Sopenharmony_ci 6262306a36Sopenharmony_ci In case of doubt, say Y 6362306a36Sopenharmony_ci 6462306a36Sopenharmony_ciconfig PPC_DT_CPU_FTRS 6562306a36Sopenharmony_ci bool "Device-tree based CPU feature discovery & setup" 6662306a36Sopenharmony_ci depends on PPC_BOOK3S_64 6762306a36Sopenharmony_ci default y 6862306a36Sopenharmony_ci help 6962306a36Sopenharmony_ci This enables code to use a new device tree binding for describing CPU 7062306a36Sopenharmony_ci compatibility and features. Saying Y here will attempt to use the new 7162306a36Sopenharmony_ci binding if the firmware provides it. Currently only the skiboot 7262306a36Sopenharmony_ci firmware provides this binding. 7362306a36Sopenharmony_ci If you're not sure say Y. 7462306a36Sopenharmony_ci 7562306a36Sopenharmony_ciconfig UDBG_RTAS_CONSOLE 7662306a36Sopenharmony_ci bool "RTAS based debug console" 7762306a36Sopenharmony_ci depends on PPC_RTAS 7862306a36Sopenharmony_ci 7962306a36Sopenharmony_ciconfig PPC_SMP_MUXED_IPI 8062306a36Sopenharmony_ci bool 8162306a36Sopenharmony_ci help 8262306a36Sopenharmony_ci Select this option if your platform supports SMP and your 8362306a36Sopenharmony_ci interrupt controller provides less than 4 interrupts to each 8462306a36Sopenharmony_ci cpu. This will enable the generic code to multiplex the 4 8562306a36Sopenharmony_ci messages on to one ipi. 8662306a36Sopenharmony_ci 8762306a36Sopenharmony_ciconfig IPIC 8862306a36Sopenharmony_ci bool 8962306a36Sopenharmony_ci 9062306a36Sopenharmony_ciconfig MPIC 9162306a36Sopenharmony_ci bool 9262306a36Sopenharmony_ci 9362306a36Sopenharmony_ciconfig MPIC_TIMER 9462306a36Sopenharmony_ci bool "MPIC Global Timer" 9562306a36Sopenharmony_ci depends on MPIC && FSL_SOC 9662306a36Sopenharmony_ci help 9762306a36Sopenharmony_ci The MPIC global timer is a hardware timer inside the 9862306a36Sopenharmony_ci Freescale PIC complying with OpenPIC standard. When the 9962306a36Sopenharmony_ci specified interval times out, the hardware timer generates 10062306a36Sopenharmony_ci an interrupt. The driver currently is only tested on fsl 10162306a36Sopenharmony_ci chip, but it can potentially support other global timers 10262306a36Sopenharmony_ci complying with the OpenPIC standard. 10362306a36Sopenharmony_ci 10462306a36Sopenharmony_ciconfig FSL_MPIC_TIMER_WAKEUP 10562306a36Sopenharmony_ci tristate "Freescale MPIC global timer wakeup driver" 10662306a36Sopenharmony_ci depends on FSL_SOC && MPIC_TIMER && PM 10762306a36Sopenharmony_ci help 10862306a36Sopenharmony_ci The driver provides a way to wake up the system by MPIC 10962306a36Sopenharmony_ci timer. 11062306a36Sopenharmony_ci e.g. "echo 5 > /sys/devices/system/mpic/timer_wakeup" 11162306a36Sopenharmony_ci 11262306a36Sopenharmony_ciconfig PPC_EPAPR_HV_PIC 11362306a36Sopenharmony_ci bool 11462306a36Sopenharmony_ci select EPAPR_PARAVIRT 11562306a36Sopenharmony_ci 11662306a36Sopenharmony_ciconfig MPIC_WEIRD 11762306a36Sopenharmony_ci bool 11862306a36Sopenharmony_ci 11962306a36Sopenharmony_ciconfig MPIC_MSGR 12062306a36Sopenharmony_ci bool "MPIC message register support" 12162306a36Sopenharmony_ci depends on MPIC 12262306a36Sopenharmony_ci help 12362306a36Sopenharmony_ci Enables support for the MPIC message registers. These 12462306a36Sopenharmony_ci registers are used for inter-processor communication. 12562306a36Sopenharmony_ci 12662306a36Sopenharmony_ciconfig PPC_I8259 12762306a36Sopenharmony_ci bool 12862306a36Sopenharmony_ci 12962306a36Sopenharmony_ciconfig U3_DART 13062306a36Sopenharmony_ci bool 13162306a36Sopenharmony_ci depends on PPC64 13262306a36Sopenharmony_ci 13362306a36Sopenharmony_ciconfig PPC_RTAS 13462306a36Sopenharmony_ci bool 13562306a36Sopenharmony_ci 13662306a36Sopenharmony_ciconfig RTAS_ERROR_LOGGING 13762306a36Sopenharmony_ci bool 13862306a36Sopenharmony_ci depends on PPC_RTAS 13962306a36Sopenharmony_ci 14062306a36Sopenharmony_ciconfig PPC_RTAS_DAEMON 14162306a36Sopenharmony_ci bool 14262306a36Sopenharmony_ci depends on PPC_RTAS 14362306a36Sopenharmony_ci 14462306a36Sopenharmony_ciconfig RTAS_PROC 14562306a36Sopenharmony_ci bool "Proc interface to RTAS" 14662306a36Sopenharmony_ci depends on PPC_RTAS && PROC_FS 14762306a36Sopenharmony_ci default y 14862306a36Sopenharmony_ci 14962306a36Sopenharmony_ciconfig RTAS_FLASH 15062306a36Sopenharmony_ci tristate "Firmware flash interface" 15162306a36Sopenharmony_ci depends on PPC64 && RTAS_PROC 15262306a36Sopenharmony_ci 15362306a36Sopenharmony_ciconfig MMIO_NVRAM 15462306a36Sopenharmony_ci bool 15562306a36Sopenharmony_ci 15662306a36Sopenharmony_ciconfig MPIC_U3_HT_IRQS 15762306a36Sopenharmony_ci bool 15862306a36Sopenharmony_ci 15962306a36Sopenharmony_ciconfig MPIC_BROKEN_REGREAD 16062306a36Sopenharmony_ci bool 16162306a36Sopenharmony_ci depends on MPIC 16262306a36Sopenharmony_ci help 16362306a36Sopenharmony_ci This option enables a MPIC driver workaround for some chips 16462306a36Sopenharmony_ci that have a bug that causes some interrupt source information 16562306a36Sopenharmony_ci to not read back properly. It is safe to use on other chips as 16662306a36Sopenharmony_ci well, but enabling it uses about 8KB of memory to keep copies 16762306a36Sopenharmony_ci of the register contents in software. 16862306a36Sopenharmony_ci 16962306a36Sopenharmony_ciconfig EEH 17062306a36Sopenharmony_ci bool 17162306a36Sopenharmony_ci depends on (PPC_POWERNV || PPC_PSERIES) && PCI 17262306a36Sopenharmony_ci default y 17362306a36Sopenharmony_ci 17462306a36Sopenharmony_ciconfig PPC_MPC106 17562306a36Sopenharmony_ci bool 17662306a36Sopenharmony_ci 17762306a36Sopenharmony_ciconfig PPC_970_NAP 17862306a36Sopenharmony_ci bool 17962306a36Sopenharmony_ci 18062306a36Sopenharmony_ciconfig PPC_P7_NAP 18162306a36Sopenharmony_ci bool 18262306a36Sopenharmony_ci 18362306a36Sopenharmony_ciconfig PPC_BOOK3S_IDLE 18462306a36Sopenharmony_ci def_bool y 18562306a36Sopenharmony_ci depends on (PPC_970_NAP || PPC_P7_NAP) 18662306a36Sopenharmony_ci 18762306a36Sopenharmony_ciconfig PPC_INDIRECT_PIO 18862306a36Sopenharmony_ci bool 18962306a36Sopenharmony_ci select GENERIC_IOMAP 19062306a36Sopenharmony_ci 19162306a36Sopenharmony_ciconfig PPC_INDIRECT_MMIO 19262306a36Sopenharmony_ci bool 19362306a36Sopenharmony_ci 19462306a36Sopenharmony_ciconfig PPC_IO_WORKAROUNDS 19562306a36Sopenharmony_ci bool 19662306a36Sopenharmony_ci 19762306a36Sopenharmony_cisource "drivers/cpufreq/Kconfig" 19862306a36Sopenharmony_ci 19962306a36Sopenharmony_cimenu "CPUIdle driver" 20062306a36Sopenharmony_ci 20162306a36Sopenharmony_cisource "drivers/cpuidle/Kconfig" 20262306a36Sopenharmony_ci 20362306a36Sopenharmony_ciendmenu 20462306a36Sopenharmony_ci 20562306a36Sopenharmony_ciconfig TAU 20662306a36Sopenharmony_ci bool "On-chip CPU temperature sensor support" 20762306a36Sopenharmony_ci depends on PPC_BOOK3S_32 20862306a36Sopenharmony_ci help 20962306a36Sopenharmony_ci G3 and G4 processors have an on-chip temperature sensor called the 21062306a36Sopenharmony_ci 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die 21162306a36Sopenharmony_ci temperature within 2-4 degrees Celsius. This option shows the current 21262306a36Sopenharmony_ci on-die temperature in /proc/cpuinfo if the cpu supports it. 21362306a36Sopenharmony_ci 21462306a36Sopenharmony_ci Unfortunately, this sensor is very inaccurate when uncalibrated, so 21562306a36Sopenharmony_ci don't assume the cpu temp is actually what /proc/cpuinfo says it is. 21662306a36Sopenharmony_ci 21762306a36Sopenharmony_ciconfig TAU_INT 21862306a36Sopenharmony_ci bool "Interrupt driven TAU driver (EXPERIMENTAL)" 21962306a36Sopenharmony_ci depends on TAU 22062306a36Sopenharmony_ci help 22162306a36Sopenharmony_ci The TAU supports an interrupt driven mode which causes an interrupt 22262306a36Sopenharmony_ci whenever the temperature goes out of range. This is the fastest way 22362306a36Sopenharmony_ci to get notified the temp has exceeded a range. With this option off, 22462306a36Sopenharmony_ci a timer is used to re-check the temperature periodically. 22562306a36Sopenharmony_ci 22662306a36Sopenharmony_ci If in doubt, say N here. 22762306a36Sopenharmony_ci 22862306a36Sopenharmony_ciconfig TAU_AVERAGE 22962306a36Sopenharmony_ci bool "Average high and low temp" 23062306a36Sopenharmony_ci depends on TAU 23162306a36Sopenharmony_ci help 23262306a36Sopenharmony_ci The TAU hardware can compare the temperature to an upper and lower 23362306a36Sopenharmony_ci bound. The default behavior is to show both the upper and lower 23462306a36Sopenharmony_ci bound in /proc/cpuinfo. If the range is large, the temperature is 23562306a36Sopenharmony_ci either changing a lot, or the TAU hardware is broken (likely on some 23662306a36Sopenharmony_ci G4's). If the range is small (around 4 degrees), the temperature is 23762306a36Sopenharmony_ci relatively stable. If you say Y here, a single temperature value, 23862306a36Sopenharmony_ci halfway between the upper and lower bounds, will be reported in 23962306a36Sopenharmony_ci /proc/cpuinfo. 24062306a36Sopenharmony_ci 24162306a36Sopenharmony_ci If in doubt, say N here. 24262306a36Sopenharmony_ci 24362306a36Sopenharmony_ciconfig QE_GPIO 24462306a36Sopenharmony_ci bool "QE GPIO support" 24562306a36Sopenharmony_ci depends on QUICC_ENGINE 24662306a36Sopenharmony_ci select GPIOLIB 24762306a36Sopenharmony_ci select OF_GPIO_MM_GPIOCHIP 24862306a36Sopenharmony_ci help 24962306a36Sopenharmony_ci Say Y here if you're going to use hardware that connects to the 25062306a36Sopenharmony_ci QE GPIOs. 25162306a36Sopenharmony_ci 25262306a36Sopenharmony_ciconfig CPM2 25362306a36Sopenharmony_ci bool "Enable support for the CPM2 (Communications Processor Module)" 25462306a36Sopenharmony_ci depends on (FSL_SOC_BOOKE && PPC32) || PPC_82xx 25562306a36Sopenharmony_ci select CPM 25662306a36Sopenharmony_ci select HAVE_PCI 25762306a36Sopenharmony_ci select GPIOLIB 25862306a36Sopenharmony_ci select OF_GPIO_MM_GPIOCHIP 25962306a36Sopenharmony_ci help 26062306a36Sopenharmony_ci The CPM2 (Communications Processor Module) is a coprocessor on 26162306a36Sopenharmony_ci embedded CPUs made by Freescale. Selecting this option means that 26262306a36Sopenharmony_ci you wish to build a kernel for a machine with a CPM2 coprocessor 26362306a36Sopenharmony_ci on it (826x, 827x, 8560). 26462306a36Sopenharmony_ci 26562306a36Sopenharmony_ciconfig FSL_ULI1575 26662306a36Sopenharmony_ci bool "ULI1575 PCIe south bridge support" 26762306a36Sopenharmony_ci depends on FSL_SOC_BOOKE || PPC_86xx 26862306a36Sopenharmony_ci depends on PCI 26962306a36Sopenharmony_ci select FSL_PCI 27062306a36Sopenharmony_ci select GENERIC_ISA_DMA 27162306a36Sopenharmony_ci help 27262306a36Sopenharmony_ci Supports for the ULI1575 PCIe south bridge that exists on some 27362306a36Sopenharmony_ci Freescale reference boards. The boards all use the ULI in pretty 27462306a36Sopenharmony_ci much the same way. 27562306a36Sopenharmony_ci 27662306a36Sopenharmony_ciconfig CPM 27762306a36Sopenharmony_ci bool 27862306a36Sopenharmony_ci select GENERIC_ALLOCATOR 27962306a36Sopenharmony_ci 28062306a36Sopenharmony_ciconfig OF_RTC 28162306a36Sopenharmony_ci bool 28262306a36Sopenharmony_ci help 28362306a36Sopenharmony_ci Uses information from the OF or flattened device tree to instantiate 28462306a36Sopenharmony_ci platform devices for direct mapped RTC chips like the DS1742 or DS1743. 28562306a36Sopenharmony_ci 28662306a36Sopenharmony_ciconfig GEN_RTC 28762306a36Sopenharmony_ci bool "Use the platform RTC operations from user space" 28862306a36Sopenharmony_ci select RTC_CLASS 28962306a36Sopenharmony_ci select RTC_DRV_GENERIC 29062306a36Sopenharmony_ci help 29162306a36Sopenharmony_ci This option provides backwards compatibility with the old gen_rtc.ko 29262306a36Sopenharmony_ci module that was traditionally used for old PowerPC machines. 29362306a36Sopenharmony_ci Platforms should migrate to enabling the RTC_DRV_GENERIC by hand 29462306a36Sopenharmony_ci replacing their get_rtc_time/set_rtc_time callbacks with 29562306a36Sopenharmony_ci a proper RTC device driver. 29662306a36Sopenharmony_ci 29762306a36Sopenharmony_ciconfig MCU_MPC8349EMITX 29862306a36Sopenharmony_ci bool "MPC8349E-mITX MCU driver" 29962306a36Sopenharmony_ci depends on I2C=y && PPC_83xx 30062306a36Sopenharmony_ci select GPIOLIB 30162306a36Sopenharmony_ci help 30262306a36Sopenharmony_ci Say Y here to enable soft power-off functionality on the Freescale 30362306a36Sopenharmony_ci boards with the MPC8349E-mITX-compatible MCU chips. This driver will 30462306a36Sopenharmony_ci also register MCU GPIOs with the generic GPIO API, so you'll able 30562306a36Sopenharmony_ci to use MCU pins as GPIOs. 30662306a36Sopenharmony_ci 30762306a36Sopenharmony_ciendmenu 308