162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Copyright 2010-2011, 2013 Freescale Semiconductor, Inc. 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Author: Roy Zang <tie-fei.zang@freescale.com> 662306a36Sopenharmony_ci * 762306a36Sopenharmony_ci * Description: 862306a36Sopenharmony_ci * P1023 RDB Board Setup 962306a36Sopenharmony_ci */ 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_ci#include <linux/kernel.h> 1262306a36Sopenharmony_ci#include <linux/init.h> 1362306a36Sopenharmony_ci#include <linux/errno.h> 1462306a36Sopenharmony_ci#include <linux/pci.h> 1562306a36Sopenharmony_ci#include <linux/delay.h> 1662306a36Sopenharmony_ci#include <linux/module.h> 1762306a36Sopenharmony_ci#include <linux/fsl_devices.h> 1862306a36Sopenharmony_ci#include <linux/of.h> 1962306a36Sopenharmony_ci#include <linux/of_address.h> 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_ci#include <asm/time.h> 2262306a36Sopenharmony_ci#include <asm/machdep.h> 2362306a36Sopenharmony_ci#include <asm/pci-bridge.h> 2462306a36Sopenharmony_ci#include <mm/mmu_decl.h> 2562306a36Sopenharmony_ci#include <asm/udbg.h> 2662306a36Sopenharmony_ci#include <asm/mpic.h> 2762306a36Sopenharmony_ci#include "smp.h" 2862306a36Sopenharmony_ci 2962306a36Sopenharmony_ci#include <sysdev/fsl_soc.h> 3062306a36Sopenharmony_ci#include <sysdev/fsl_pci.h> 3162306a36Sopenharmony_ci 3262306a36Sopenharmony_ci#include "mpc85xx.h" 3362306a36Sopenharmony_ci 3462306a36Sopenharmony_ci/* ************************************************************************ 3562306a36Sopenharmony_ci * 3662306a36Sopenharmony_ci * Setup the architecture 3762306a36Sopenharmony_ci * 3862306a36Sopenharmony_ci */ 3962306a36Sopenharmony_cistatic void __init p1023_rdb_setup_arch(void) 4062306a36Sopenharmony_ci{ 4162306a36Sopenharmony_ci struct device_node *np; 4262306a36Sopenharmony_ci 4362306a36Sopenharmony_ci if (ppc_md.progress) 4462306a36Sopenharmony_ci ppc_md.progress("p1023_rdb_setup_arch()", 0); 4562306a36Sopenharmony_ci 4662306a36Sopenharmony_ci /* Map BCSR area */ 4762306a36Sopenharmony_ci np = of_find_node_by_name(NULL, "bcsr"); 4862306a36Sopenharmony_ci if (np != NULL) { 4962306a36Sopenharmony_ci static u8 __iomem *bcsr_regs; 5062306a36Sopenharmony_ci 5162306a36Sopenharmony_ci bcsr_regs = of_iomap(np, 0); 5262306a36Sopenharmony_ci of_node_put(np); 5362306a36Sopenharmony_ci 5462306a36Sopenharmony_ci if (!bcsr_regs) { 5562306a36Sopenharmony_ci printk(KERN_ERR 5662306a36Sopenharmony_ci "BCSR: Failed to map bcsr register space\n"); 5762306a36Sopenharmony_ci return; 5862306a36Sopenharmony_ci } else { 5962306a36Sopenharmony_ci#define BCSR15_I2C_BUS0_SEG_CLR 0x07 6062306a36Sopenharmony_ci#define BCSR15_I2C_BUS0_SEG2 0x02 6162306a36Sopenharmony_ci/* 6262306a36Sopenharmony_ci * Note: Accessing exclusively i2c devices. 6362306a36Sopenharmony_ci * 6462306a36Sopenharmony_ci * The i2c controller selects initially ID EEPROM in the u-boot; 6562306a36Sopenharmony_ci * but if menu configuration selects RTC support in the kernel, 6662306a36Sopenharmony_ci * the i2c controller switches to select RTC chip in the kernel. 6762306a36Sopenharmony_ci */ 6862306a36Sopenharmony_ci#ifdef CONFIG_RTC_CLASS 6962306a36Sopenharmony_ci /* Enable RTC chip on the segment #2 of i2c */ 7062306a36Sopenharmony_ci clrbits8(&bcsr_regs[15], BCSR15_I2C_BUS0_SEG_CLR); 7162306a36Sopenharmony_ci setbits8(&bcsr_regs[15], BCSR15_I2C_BUS0_SEG2); 7262306a36Sopenharmony_ci#endif 7362306a36Sopenharmony_ci 7462306a36Sopenharmony_ci iounmap(bcsr_regs); 7562306a36Sopenharmony_ci } 7662306a36Sopenharmony_ci } 7762306a36Sopenharmony_ci 7862306a36Sopenharmony_ci mpc85xx_smp_init(); 7962306a36Sopenharmony_ci 8062306a36Sopenharmony_ci fsl_pci_assign_primary(); 8162306a36Sopenharmony_ci} 8262306a36Sopenharmony_ci 8362306a36Sopenharmony_cimachine_arch_initcall(p1023_rdb, mpc85xx_common_publish_devices); 8462306a36Sopenharmony_ci 8562306a36Sopenharmony_cistatic void __init p1023_rdb_pic_init(void) 8662306a36Sopenharmony_ci{ 8762306a36Sopenharmony_ci struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN | 8862306a36Sopenharmony_ci MPIC_SINGLE_DEST_CPU, 8962306a36Sopenharmony_ci 0, 256, " OpenPIC "); 9062306a36Sopenharmony_ci 9162306a36Sopenharmony_ci BUG_ON(mpic == NULL); 9262306a36Sopenharmony_ci 9362306a36Sopenharmony_ci mpic_init(mpic); 9462306a36Sopenharmony_ci} 9562306a36Sopenharmony_ci 9662306a36Sopenharmony_cidefine_machine(p1023_rdb) { 9762306a36Sopenharmony_ci .name = "P1023 RDB", 9862306a36Sopenharmony_ci .compatible = "fsl,P1023RDB", 9962306a36Sopenharmony_ci .setup_arch = p1023_rdb_setup_arch, 10062306a36Sopenharmony_ci .init_IRQ = p1023_rdb_pic_init, 10162306a36Sopenharmony_ci .get_irq = mpic_get_irq, 10262306a36Sopenharmony_ci .progress = udbg_progress, 10362306a36Sopenharmony_ci#ifdef CONFIG_PCI 10462306a36Sopenharmony_ci .pcibios_fixup_bus = fsl_pcibios_fixup_bus, 10562306a36Sopenharmony_ci .pcibios_fixup_phb = fsl_pcibios_fixup_phb, 10662306a36Sopenharmony_ci#endif 10762306a36Sopenharmony_ci}; 108