1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * smp.h: PowerPC-specific SMP code.
4 *
5 * Original was a copy of sparc smp.h.  Now heavily modified
6 * for PPC.
7 *
8 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
9 * Copyright (C) 1996-2001 Cort Dougan <cort@fsmlabs.com>
10 */
11
12#ifndef _ASM_POWERPC_SMP_H
13#define _ASM_POWERPC_SMP_H
14#ifdef __KERNEL__
15
16#include <linux/threads.h>
17#include <linux/cpumask.h>
18#include <linux/kernel.h>
19#include <linux/irqreturn.h>
20
21#ifndef __ASSEMBLY__
22
23#ifdef CONFIG_PPC64
24#include <asm/paca.h>
25#endif
26#include <asm/percpu.h>
27
28extern int boot_cpuid;
29extern int boot_cpu_hwid; /* PPC64 only */
30extern int spinning_secondaries;
31extern u32 *cpu_to_phys_id;
32extern bool coregroup_enabled;
33
34extern int cpu_to_chip_id(int cpu);
35extern int *chip_id_lookup_table;
36
37DECLARE_PER_CPU(cpumask_var_t, thread_group_l1_cache_map);
38DECLARE_PER_CPU(cpumask_var_t, thread_group_l2_cache_map);
39DECLARE_PER_CPU(cpumask_var_t, thread_group_l3_cache_map);
40
41#ifdef CONFIG_SMP
42
43struct smp_ops_t {
44	void  (*message_pass)(int cpu, int msg);
45#ifdef CONFIG_PPC_SMP_MUXED_IPI
46	void  (*cause_ipi)(int cpu);
47#endif
48	int   (*cause_nmi_ipi)(int cpu);
49	void  (*probe)(void);
50	int   (*kick_cpu)(int nr);
51	int   (*prepare_cpu)(int nr);
52	void  (*setup_cpu)(int nr);
53	void  (*bringup_done)(void);
54	void  (*take_timebase)(void);
55	void  (*give_timebase)(void);
56	int   (*cpu_disable)(void);
57	void  (*cpu_die)(unsigned int nr);
58	int   (*cpu_bootable)(unsigned int nr);
59#ifdef CONFIG_HOTPLUG_CPU
60	void  (*cpu_offline_self)(void);
61#endif
62};
63
64extern struct task_struct *secondary_current;
65
66void start_secondary(void *unused);
67extern int smp_send_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us);
68extern int smp_send_safe_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us);
69extern void smp_send_debugger_break(void);
70extern void __noreturn start_secondary_resume(void);
71extern void smp_generic_give_timebase(void);
72extern void smp_generic_take_timebase(void);
73
74DECLARE_PER_CPU(unsigned int, cpu_pvr);
75
76#ifdef CONFIG_HOTPLUG_CPU
77int generic_cpu_disable(void);
78void generic_cpu_die(unsigned int cpu);
79void generic_set_cpu_dead(unsigned int cpu);
80void generic_set_cpu_up(unsigned int cpu);
81int generic_check_cpu_restart(unsigned int cpu);
82int is_cpu_dead(unsigned int cpu);
83#else
84#define generic_set_cpu_up(i)	do { } while (0)
85#endif
86
87#ifdef CONFIG_PPC64
88#define raw_smp_processor_id()	(local_paca->paca_index)
89#define hard_smp_processor_id() (get_paca()->hw_cpu_id)
90#else
91/* 32-bit */
92extern int smp_hw_index[];
93
94#define raw_smp_processor_id()		(current_thread_info()->cpu)
95#define hard_smp_processor_id() 	(smp_hw_index[smp_processor_id()])
96
97static inline int get_hard_smp_processor_id(int cpu)
98{
99	return smp_hw_index[cpu];
100}
101
102static inline void set_hard_smp_processor_id(int cpu, int phys)
103{
104	smp_hw_index[cpu] = phys;
105}
106#endif
107
108DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_map);
109DECLARE_PER_CPU(cpumask_var_t, cpu_l2_cache_map);
110DECLARE_PER_CPU(cpumask_var_t, cpu_core_map);
111DECLARE_PER_CPU(cpumask_var_t, cpu_smallcore_map);
112
113static inline struct cpumask *cpu_sibling_mask(int cpu)
114{
115	return per_cpu(cpu_sibling_map, cpu);
116}
117
118static inline struct cpumask *cpu_core_mask(int cpu)
119{
120	return per_cpu(cpu_core_map, cpu);
121}
122
123static inline struct cpumask *cpu_l2_cache_mask(int cpu)
124{
125	return per_cpu(cpu_l2_cache_map, cpu);
126}
127
128static inline struct cpumask *cpu_smallcore_mask(int cpu)
129{
130	return per_cpu(cpu_smallcore_map, cpu);
131}
132
133extern int cpu_to_core_id(int cpu);
134
135extern bool has_big_cores;
136extern bool thread_group_shares_l2;
137extern bool thread_group_shares_l3;
138
139#define cpu_smt_mask cpu_smt_mask
140#ifdef CONFIG_SCHED_SMT
141static inline const struct cpumask *cpu_smt_mask(int cpu)
142{
143	if (has_big_cores)
144		return per_cpu(cpu_smallcore_map, cpu);
145
146	return per_cpu(cpu_sibling_map, cpu);
147}
148#endif /* CONFIG_SCHED_SMT */
149
150/* Since OpenPIC has only 4 IPIs, we use slightly different message numbers.
151 *
152 * Make sure this matches openpic_request_IPIs in open_pic.c, or what shows up
153 * in /proc/interrupts will be wrong!!! --Troy */
154#define PPC_MSG_CALL_FUNCTION	0
155#define PPC_MSG_RESCHEDULE	1
156#define PPC_MSG_TICK_BROADCAST	2
157#define PPC_MSG_NMI_IPI		3
158
159/* This is only used by the powernv kernel */
160#define PPC_MSG_RM_HOST_ACTION	4
161
162#define NMI_IPI_ALL_OTHERS		-2
163
164#ifdef CONFIG_NMI_IPI
165extern int smp_handle_nmi_ipi(struct pt_regs *regs);
166#else
167static inline int smp_handle_nmi_ipi(struct pt_regs *regs) { return 0; }
168#endif
169
170/* for irq controllers that have dedicated ipis per message (4) */
171extern int smp_request_message_ipi(int virq, int message);
172extern const char *smp_ipi_name[];
173
174/* for irq controllers with only a single ipi */
175extern void smp_muxed_ipi_message_pass(int cpu, int msg);
176extern void smp_muxed_ipi_set_message(int cpu, int msg);
177extern irqreturn_t smp_ipi_demux(void);
178extern irqreturn_t smp_ipi_demux_relaxed(void);
179
180void smp_init_pSeries(void);
181void smp_init_cell(void);
182void smp_setup_cpu_maps(void);
183
184extern int __cpu_disable(void);
185extern void __cpu_die(unsigned int cpu);
186
187#else
188/* for UP */
189#define hard_smp_processor_id()		get_hard_smp_processor_id(0)
190#define smp_setup_cpu_maps()
191#define thread_group_shares_l2  0
192#define thread_group_shares_l3	0
193static inline const struct cpumask *cpu_sibling_mask(int cpu)
194{
195	return cpumask_of(cpu);
196}
197
198static inline const struct cpumask *cpu_smallcore_mask(int cpu)
199{
200	return cpumask_of(cpu);
201}
202
203static inline const struct cpumask *cpu_l2_cache_mask(int cpu)
204{
205	return cpumask_of(cpu);
206}
207#endif /* CONFIG_SMP */
208
209#ifdef CONFIG_PPC64
210static inline int get_hard_smp_processor_id(int cpu)
211{
212	return paca_ptrs[cpu]->hw_cpu_id;
213}
214
215static inline void set_hard_smp_processor_id(int cpu, int phys)
216{
217	paca_ptrs[cpu]->hw_cpu_id = phys;
218}
219#else
220/* 32-bit */
221#ifndef CONFIG_SMP
222extern int boot_cpuid_phys;
223static inline int get_hard_smp_processor_id(int cpu)
224{
225	return boot_cpuid_phys;
226}
227
228static inline void set_hard_smp_processor_id(int cpu, int phys)
229{
230	boot_cpuid_phys = phys;
231}
232#endif /* !CONFIG_SMP */
233#endif /* !CONFIG_PPC64 */
234
235#if defined(CONFIG_PPC64) && (defined(CONFIG_SMP) || defined(CONFIG_KEXEC_CORE))
236extern void smp_release_cpus(void);
237#else
238static inline void smp_release_cpus(void) { }
239#endif
240
241extern int smt_enabled_at_boot;
242
243extern void smp_mpic_probe(void);
244extern void smp_mpic_setup_cpu(int cpu);
245extern int smp_generic_kick_cpu(int nr);
246extern int smp_generic_cpu_bootable(unsigned int nr);
247
248
249extern void smp_generic_give_timebase(void);
250extern void smp_generic_take_timebase(void);
251
252extern struct smp_ops_t *smp_ops;
253
254extern void arch_send_call_function_single_ipi(int cpu);
255extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
256
257/* Definitions relative to the secondary CPU spin loop
258 * and entry point. Not all of them exist on both 32 and
259 * 64-bit but defining them all here doesn't harm
260 */
261extern void generic_secondary_smp_init(void);
262extern unsigned long __secondary_hold_spinloop;
263extern unsigned long __secondary_hold_acknowledge;
264extern char __secondary_hold;
265extern unsigned int booting_thread_hwid;
266
267extern void __early_start(void);
268#endif /* __ASSEMBLY__ */
269
270#endif /* __KERNEL__ */
271#endif /* _ASM_POWERPC_SMP_H) */
272