162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-or-later */
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Performance event support - hardware-specific disambiguation
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci * For now this is a compile-time decision, but eventually it should be
662306a36Sopenharmony_ci * runtime.  This would allow multiplatform perf event support for e300 (fsl
762306a36Sopenharmony_ci * embedded perf counters) plus server/classic, and would accommodate
862306a36Sopenharmony_ci * devices other than the core which provide their own performance counters.
962306a36Sopenharmony_ci *
1062306a36Sopenharmony_ci * Copyright 2010 Freescale Semiconductor, Inc.
1162306a36Sopenharmony_ci */
1262306a36Sopenharmony_ci
1362306a36Sopenharmony_ci#ifdef CONFIG_PPC_PERF_CTRS
1462306a36Sopenharmony_ci#include <asm/perf_event_server.h>
1562306a36Sopenharmony_ci#else
1662306a36Sopenharmony_cistatic inline bool is_sier_available(void) { return false; }
1762306a36Sopenharmony_cistatic inline unsigned long get_pmcs_ext_regs(int idx) { return 0; }
1862306a36Sopenharmony_ci#endif
1962306a36Sopenharmony_ci
2062306a36Sopenharmony_ci#ifdef CONFIG_FSL_EMB_PERF_EVENT
2162306a36Sopenharmony_ci#include <asm/perf_event_fsl_emb.h>
2262306a36Sopenharmony_ci#endif
2362306a36Sopenharmony_ci
2462306a36Sopenharmony_ci#ifdef CONFIG_PERF_EVENTS
2562306a36Sopenharmony_ci#include <asm/ptrace.h>
2662306a36Sopenharmony_ci#include <asm/reg.h>
2762306a36Sopenharmony_ci
2862306a36Sopenharmony_ci#define perf_arch_bpf_user_pt_regs(regs) &regs->user_regs
2962306a36Sopenharmony_ci
3062306a36Sopenharmony_ci/*
3162306a36Sopenharmony_ci * Overload regs->result to specify whether we should use the MSR (result
3262306a36Sopenharmony_ci * is zero) or the SIAR (result is non zero).
3362306a36Sopenharmony_ci */
3462306a36Sopenharmony_ci#define perf_arch_fetch_caller_regs(regs, __ip)			\
3562306a36Sopenharmony_ci	do {							\
3662306a36Sopenharmony_ci		(regs)->result = 0;				\
3762306a36Sopenharmony_ci		(regs)->nip = __ip;				\
3862306a36Sopenharmony_ci		(regs)->gpr[1] = current_stack_frame();		\
3962306a36Sopenharmony_ci		asm volatile("mfmsr %0" : "=r" ((regs)->msr));	\
4062306a36Sopenharmony_ci	} while (0)
4162306a36Sopenharmony_ci
4262306a36Sopenharmony_ci/* To support perf_regs sier update */
4362306a36Sopenharmony_ciextern bool is_sier_available(void);
4462306a36Sopenharmony_ciextern unsigned long get_pmcs_ext_regs(int idx);
4562306a36Sopenharmony_ci/* To define perf extended regs mask value */
4662306a36Sopenharmony_ciextern u64 PERF_REG_EXTENDED_MASK;
4762306a36Sopenharmony_ci#define PERF_REG_EXTENDED_MASK	PERF_REG_EXTENDED_MASK
4862306a36Sopenharmony_ci#endif
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