162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */
262306a36Sopenharmony_ci#ifndef _ASM_POWERPC_NOHASH_32_PTE_85xx_H
362306a36Sopenharmony_ci#define _ASM_POWERPC_NOHASH_32_PTE_85xx_H
462306a36Sopenharmony_ci#ifdef __KERNEL__
562306a36Sopenharmony_ci
662306a36Sopenharmony_ci/* PTE bit definitions for Freescale BookE SW loaded TLB MMU based
762306a36Sopenharmony_ci * processors
862306a36Sopenharmony_ci *
962306a36Sopenharmony_ci   MMU Assist Register 3:
1062306a36Sopenharmony_ci
1162306a36Sopenharmony_ci   32 33 34 35 36  ... 50 51 52 53 54 55 56 57 58 59 60 61 62 63
1262306a36Sopenharmony_ci   RPN......................  0  0 U0 U1 U2 U3 UX SX UW SW UR SR
1362306a36Sopenharmony_ci
1462306a36Sopenharmony_ci   - PRESENT *must* be in the bottom two bits because swap PTEs use
1562306a36Sopenharmony_ci     the top 30 bits.
1662306a36Sopenharmony_ci
1762306a36Sopenharmony_ci*/
1862306a36Sopenharmony_ci
1962306a36Sopenharmony_ci/* Definitions for FSL Book-E Cores */
2062306a36Sopenharmony_ci#define _PAGE_PRESENT	0x00001	/* S: PTE contains a translation */
2162306a36Sopenharmony_ci#define _PAGE_USER	0x00002	/* S: User page (maps to UR) */
2262306a36Sopenharmony_ci#define _PAGE_RW	0x00004	/* S: Write permission (SW) */
2362306a36Sopenharmony_ci#define _PAGE_DIRTY	0x00008	/* S: Page dirty */
2462306a36Sopenharmony_ci#define _PAGE_EXEC	0x00010	/* H: SX permission */
2562306a36Sopenharmony_ci#define _PAGE_ACCESSED	0x00020	/* S: Page referenced */
2662306a36Sopenharmony_ci
2762306a36Sopenharmony_ci#define _PAGE_ENDIAN	0x00040	/* H: E bit */
2862306a36Sopenharmony_ci#define _PAGE_GUARDED	0x00080	/* H: G bit */
2962306a36Sopenharmony_ci#define _PAGE_COHERENT	0x00100	/* H: M bit */
3062306a36Sopenharmony_ci#define _PAGE_NO_CACHE	0x00200	/* H: I bit */
3162306a36Sopenharmony_ci#define _PAGE_WRITETHRU	0x00400	/* H: W bit */
3262306a36Sopenharmony_ci#define _PAGE_SPECIAL	0x00800 /* S: Special page */
3362306a36Sopenharmony_ci
3462306a36Sopenharmony_ci#define _PAGE_KERNEL_RO		0
3562306a36Sopenharmony_ci#define _PAGE_KERNEL_ROX	_PAGE_EXEC
3662306a36Sopenharmony_ci#define _PAGE_KERNEL_RW		(_PAGE_DIRTY | _PAGE_RW)
3762306a36Sopenharmony_ci#define _PAGE_KERNEL_RWX	(_PAGE_DIRTY | _PAGE_RW | _PAGE_EXEC)
3862306a36Sopenharmony_ci
3962306a36Sopenharmony_ci/* No page size encoding in the linux PTE */
4062306a36Sopenharmony_ci#define _PAGE_PSIZE		0
4162306a36Sopenharmony_ci
4262306a36Sopenharmony_ci#define _PMD_PRESENT	0
4362306a36Sopenharmony_ci#define _PMD_PRESENT_MASK (PAGE_MASK)
4462306a36Sopenharmony_ci#define _PMD_BAD	(~PAGE_MASK)
4562306a36Sopenharmony_ci#define _PMD_USER	0
4662306a36Sopenharmony_ci
4762306a36Sopenharmony_ci#define _PTE_NONE_MASK	0
4862306a36Sopenharmony_ci
4962306a36Sopenharmony_ci#define PTE_WIMGE_SHIFT (6)
5062306a36Sopenharmony_ci
5162306a36Sopenharmony_ci/*
5262306a36Sopenharmony_ci * We define 2 sets of base prot bits, one for basic pages (ie,
5362306a36Sopenharmony_ci * cacheable kernel and user pages) and one for non cacheable
5462306a36Sopenharmony_ci * pages. We always set _PAGE_COHERENT when SMP is enabled or
5562306a36Sopenharmony_ci * the processor might need it for DMA coherency.
5662306a36Sopenharmony_ci */
5762306a36Sopenharmony_ci#define _PAGE_BASE_NC	(_PAGE_PRESENT | _PAGE_ACCESSED)
5862306a36Sopenharmony_ci#if defined(CONFIG_SMP) || defined(CONFIG_PPC_E500MC)
5962306a36Sopenharmony_ci#define _PAGE_BASE	(_PAGE_BASE_NC | _PAGE_COHERENT)
6062306a36Sopenharmony_ci#else
6162306a36Sopenharmony_ci#define _PAGE_BASE	(_PAGE_BASE_NC)
6262306a36Sopenharmony_ci#endif
6362306a36Sopenharmony_ci
6462306a36Sopenharmony_ci/* Permission masks used to generate the __P and __S table */
6562306a36Sopenharmony_ci#define PAGE_NONE	__pgprot(_PAGE_BASE)
6662306a36Sopenharmony_ci#define PAGE_SHARED	__pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)
6762306a36Sopenharmony_ci#define PAGE_SHARED_X	__pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | _PAGE_EXEC)
6862306a36Sopenharmony_ci#define PAGE_COPY	__pgprot(_PAGE_BASE | _PAGE_USER)
6962306a36Sopenharmony_ci#define PAGE_COPY_X	__pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
7062306a36Sopenharmony_ci#define PAGE_READONLY	__pgprot(_PAGE_BASE | _PAGE_USER)
7162306a36Sopenharmony_ci#define PAGE_READONLY_X	__pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
7262306a36Sopenharmony_ci
7362306a36Sopenharmony_ci#endif /* __KERNEL__ */
7462306a36Sopenharmony_ci#endif /*  _ASM_POWERPC_NOHASH_32_PTE_FSL_85xx_H */
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