162306a36Sopenharmony_ci/*
262306a36Sopenharmony_ci * Device Tree Source for IBM Embedded PPC 476 Platform
362306a36Sopenharmony_ci *
462306a36Sopenharmony_ci * Copyright 2010 Torez Smith, IBM Corporation.
562306a36Sopenharmony_ci *
662306a36Sopenharmony_ci * Based on earlier code:
762306a36Sopenharmony_ci *    Copyright (c) 2006, 2007 IBM Corp.
862306a36Sopenharmony_ci *    Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
962306a36Sopenharmony_ci *
1062306a36Sopenharmony_ci * This file is licensed under the terms of the GNU General Public
1162306a36Sopenharmony_ci * License version 2.  This program is licensed "as is" without
1262306a36Sopenharmony_ci * any warranty of any kind, whether express or implied.
1362306a36Sopenharmony_ci */
1462306a36Sopenharmony_ci
1562306a36Sopenharmony_ci/dts-v1/;
1662306a36Sopenharmony_ci
1762306a36Sopenharmony_ci/ {
1862306a36Sopenharmony_ci	#address-cells = <2>;
1962306a36Sopenharmony_ci	#size-cells = <1>;
2062306a36Sopenharmony_ci	model = "ibm,iss-4xx";
2162306a36Sopenharmony_ci	compatible = "ibm,iss-4xx";
2262306a36Sopenharmony_ci	dcr-parent = <&{/cpus/cpu@0}>;
2362306a36Sopenharmony_ci
2462306a36Sopenharmony_ci	aliases {
2562306a36Sopenharmony_ci		serial0 = &UART0;
2662306a36Sopenharmony_ci	};
2762306a36Sopenharmony_ci
2862306a36Sopenharmony_ci	cpus {
2962306a36Sopenharmony_ci		#address-cells = <1>;
3062306a36Sopenharmony_ci		#size-cells = <0>;
3162306a36Sopenharmony_ci
3262306a36Sopenharmony_ci		cpu@0 {
3362306a36Sopenharmony_ci			device_type = "cpu";
3462306a36Sopenharmony_ci			model = "PowerPC,4xx"; // real CPU changed in sim
3562306a36Sopenharmony_ci			reg = <0x00000000>;
3662306a36Sopenharmony_ci			clock-frequency = <100000000>; // 100Mhz :-)
3762306a36Sopenharmony_ci			timebase-frequency = <100000000>;
3862306a36Sopenharmony_ci			i-cache-line-size = <32>; // may need fixup in sim
3962306a36Sopenharmony_ci			d-cache-line-size = <32>; // may need fixup in sim
4062306a36Sopenharmony_ci			i-cache-size = <32768>; /* may need fixup in sim */
4162306a36Sopenharmony_ci			d-cache-size = <32768>; /* may need fixup in sim */
4262306a36Sopenharmony_ci			dcr-controller;
4362306a36Sopenharmony_ci			dcr-access-method = "native";
4462306a36Sopenharmony_ci		};
4562306a36Sopenharmony_ci	};
4662306a36Sopenharmony_ci
4762306a36Sopenharmony_ci	memory {
4862306a36Sopenharmony_ci		device_type = "memory";
4962306a36Sopenharmony_ci		reg = <0x00000000 0x00000000 0x00000000>; // Filled in by zImage
5062306a36Sopenharmony_ci	};
5162306a36Sopenharmony_ci
5262306a36Sopenharmony_ci	UIC0: interrupt-controller0 {
5362306a36Sopenharmony_ci		compatible = "ibm,uic-4xx", "ibm,uic";
5462306a36Sopenharmony_ci		interrupt-controller;
5562306a36Sopenharmony_ci		cell-index = <0>;
5662306a36Sopenharmony_ci		dcr-reg = <0x0c0 0x009>;
5762306a36Sopenharmony_ci		#address-cells = <0>;
5862306a36Sopenharmony_ci		#size-cells = <0>;
5962306a36Sopenharmony_ci		#interrupt-cells = <2>;
6062306a36Sopenharmony_ci
6162306a36Sopenharmony_ci	};
6262306a36Sopenharmony_ci
6362306a36Sopenharmony_ci	UIC1: interrupt-controller1 {
6462306a36Sopenharmony_ci		compatible = "ibm,uic-4xx", "ibm,uic";
6562306a36Sopenharmony_ci		interrupt-controller;
6662306a36Sopenharmony_ci		cell-index = <1>;
6762306a36Sopenharmony_ci		dcr-reg = <0x0d0 0x009>;
6862306a36Sopenharmony_ci		#address-cells = <0>;
6962306a36Sopenharmony_ci		#size-cells = <0>;
7062306a36Sopenharmony_ci		#interrupt-cells = <2>;
7162306a36Sopenharmony_ci		interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
7262306a36Sopenharmony_ci		interrupt-parent = <&UIC0>;
7362306a36Sopenharmony_ci	};
7462306a36Sopenharmony_ci
7562306a36Sopenharmony_ci	plb {
7662306a36Sopenharmony_ci		compatible = "ibm,plb-4xx", "ibm,plb4"; /* Could be PLB6, doesn't matter */
7762306a36Sopenharmony_ci		#address-cells = <2>;
7862306a36Sopenharmony_ci		#size-cells = <1>;
7962306a36Sopenharmony_ci		ranges;
8062306a36Sopenharmony_ci		clock-frequency = <0>; // Filled in by zImage
8162306a36Sopenharmony_ci
8262306a36Sopenharmony_ci		POB0: opb {
8362306a36Sopenharmony_ci			compatible = "ibm,opb-4xx", "ibm,opb";
8462306a36Sopenharmony_ci			#address-cells = <1>;
8562306a36Sopenharmony_ci			#size-cells = <1>;
8662306a36Sopenharmony_ci			/* Wish there was a nicer way of specifying a full 32-bit
8762306a36Sopenharmony_ci			   range */
8862306a36Sopenharmony_ci			ranges = <0x00000000 0x00000001 0x00000000 0x80000000
8962306a36Sopenharmony_ci				  0x80000000 0x00000001 0x80000000 0x80000000>;
9062306a36Sopenharmony_ci			clock-frequency = <0>; // Filled in by zImage
9162306a36Sopenharmony_ci			UART0: serial@40000200 {
9262306a36Sopenharmony_ci				device_type = "serial";
9362306a36Sopenharmony_ci				compatible = "ns16550a";
9462306a36Sopenharmony_ci				reg = <0x40000200 0x00000008>;
9562306a36Sopenharmony_ci				virtual-reg = <0xe0000200>;
9662306a36Sopenharmony_ci				clock-frequency = <11059200>;
9762306a36Sopenharmony_ci				current-speed = <115200>;
9862306a36Sopenharmony_ci				interrupt-parent = <&UIC0>;
9962306a36Sopenharmony_ci				interrupts = <0x0 0x4>;
10062306a36Sopenharmony_ci			};
10162306a36Sopenharmony_ci		};
10262306a36Sopenharmony_ci	};
10362306a36Sopenharmony_ci
10462306a36Sopenharmony_ci	nvrtc {
10562306a36Sopenharmony_ci		compatible = "ds1743-nvram", "ds1743", "rtc-ds1743";
10662306a36Sopenharmony_ci		reg = <0 0xEF703000 0x2000>;
10762306a36Sopenharmony_ci	};
10862306a36Sopenharmony_ci	iss-block {
10962306a36Sopenharmony_ci		compatible = "ibm,iss-sim-block-device";
11062306a36Sopenharmony_ci		reg = <0 0xEF701000 0x1000>;
11162306a36Sopenharmony_ci	};
11262306a36Sopenharmony_ci
11362306a36Sopenharmony_ci	chosen {
11462306a36Sopenharmony_ci		stdout-path = "/plb/opb/serial@40000200";
11562306a36Sopenharmony_ci	};
11662306a36Sopenharmony_ci};
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