1// SPDX-License-Identifier: GPL-2.0 2/* 3 * linux/arch/parisc/mm/init.c 4 * 5 * Copyright (C) 1995 Linus Torvalds 6 * Copyright 1999 SuSE GmbH 7 * changed by Philipp Rumpf 8 * Copyright 1999 Philipp Rumpf (prumpf@tux.org) 9 * Copyright 2004 Randolph Chung (tausq@debian.org) 10 * Copyright 2006-2007 Helge Deller (deller@gmx.de) 11 * 12 */ 13 14 15#include <linux/module.h> 16#include <linux/mm.h> 17#include <linux/memblock.h> 18#include <linux/gfp.h> 19#include <linux/delay.h> 20#include <linux/init.h> 21#include <linux/initrd.h> 22#include <linux/swap.h> 23#include <linux/unistd.h> 24#include <linux/nodemask.h> /* for node_online_map */ 25#include <linux/pagemap.h> /* for release_pages */ 26#include <linux/compat.h> 27 28#include <asm/pgalloc.h> 29#include <asm/tlb.h> 30#include <asm/pdc_chassis.h> 31#include <asm/mmzone.h> 32#include <asm/sections.h> 33#include <asm/msgbuf.h> 34#include <asm/sparsemem.h> 35#include <asm/asm-offsets.h> 36 37extern int data_start; 38extern void parisc_kernel_start(void); /* Kernel entry point in head.S */ 39 40#if CONFIG_PGTABLE_LEVELS == 3 41pmd_t pmd0[PTRS_PER_PMD] __section(".data..vm0.pmd") __attribute__ ((aligned(PAGE_SIZE))); 42#endif 43 44pgd_t swapper_pg_dir[PTRS_PER_PGD] __section(".data..vm0.pgd") __attribute__ ((aligned(PAGE_SIZE))); 45pte_t pg0[PT_INITIAL * PTRS_PER_PTE] __section(".data..vm0.pte") __attribute__ ((aligned(PAGE_SIZE))); 46 47static struct resource data_resource = { 48 .name = "Kernel data", 49 .flags = IORESOURCE_BUSY | IORESOURCE_SYSTEM_RAM, 50}; 51 52static struct resource code_resource = { 53 .name = "Kernel code", 54 .flags = IORESOURCE_BUSY | IORESOURCE_SYSTEM_RAM, 55}; 56 57static struct resource pdcdata_resource = { 58 .name = "PDC data (Page Zero)", 59 .start = 0, 60 .end = 0x9ff, 61 .flags = IORESOURCE_BUSY | IORESOURCE_MEM, 62}; 63 64static struct resource sysram_resources[MAX_PHYSMEM_RANGES] __ro_after_init; 65 66/* The following array is initialized from the firmware specific 67 * information retrieved in kernel/inventory.c. 68 */ 69 70physmem_range_t pmem_ranges[MAX_PHYSMEM_RANGES] __initdata; 71int npmem_ranges __initdata; 72 73#ifdef CONFIG_64BIT 74#define MAX_MEM (1UL << MAX_PHYSMEM_BITS) 75#else /* !CONFIG_64BIT */ 76#define MAX_MEM (3584U*1024U*1024U) 77#endif /* !CONFIG_64BIT */ 78 79static unsigned long mem_limit __read_mostly = MAX_MEM; 80 81static void __init mem_limit_func(void) 82{ 83 char *cp, *end; 84 unsigned long limit; 85 86 /* We need this before __setup() functions are called */ 87 88 limit = MAX_MEM; 89 for (cp = boot_command_line; *cp; ) { 90 if (memcmp(cp, "mem=", 4) == 0) { 91 cp += 4; 92 limit = memparse(cp, &end); 93 if (end != cp) 94 break; 95 cp = end; 96 } else { 97 while (*cp != ' ' && *cp) 98 ++cp; 99 while (*cp == ' ') 100 ++cp; 101 } 102 } 103 104 if (limit < mem_limit) 105 mem_limit = limit; 106} 107 108#define MAX_GAP (0x40000000UL >> PAGE_SHIFT) 109 110static void __init setup_bootmem(void) 111{ 112 unsigned long mem_max; 113#ifndef CONFIG_SPARSEMEM 114 physmem_range_t pmem_holes[MAX_PHYSMEM_RANGES - 1]; 115 int npmem_holes; 116#endif 117 int i, sysram_resource_count; 118 119 disable_sr_hashing(); /* Turn off space register hashing */ 120 121 /* 122 * Sort the ranges. Since the number of ranges is typically 123 * small, and performance is not an issue here, just do 124 * a simple insertion sort. 125 */ 126 127 for (i = 1; i < npmem_ranges; i++) { 128 int j; 129 130 for (j = i; j > 0; j--) { 131 if (pmem_ranges[j-1].start_pfn < 132 pmem_ranges[j].start_pfn) { 133 134 break; 135 } 136 swap(pmem_ranges[j-1], pmem_ranges[j]); 137 } 138 } 139 140#ifndef CONFIG_SPARSEMEM 141 /* 142 * Throw out ranges that are too far apart (controlled by 143 * MAX_GAP). 144 */ 145 146 for (i = 1; i < npmem_ranges; i++) { 147 if (pmem_ranges[i].start_pfn - 148 (pmem_ranges[i-1].start_pfn + 149 pmem_ranges[i-1].pages) > MAX_GAP) { 150 npmem_ranges = i; 151 printk("Large gap in memory detected (%ld pages). " 152 "Consider turning on CONFIG_SPARSEMEM\n", 153 pmem_ranges[i].start_pfn - 154 (pmem_ranges[i-1].start_pfn + 155 pmem_ranges[i-1].pages)); 156 break; 157 } 158 } 159#endif 160 161 /* Print the memory ranges */ 162 pr_info("Memory Ranges:\n"); 163 164 for (i = 0; i < npmem_ranges; i++) { 165 struct resource *res = &sysram_resources[i]; 166 unsigned long start; 167 unsigned long size; 168 169 size = (pmem_ranges[i].pages << PAGE_SHIFT); 170 start = (pmem_ranges[i].start_pfn << PAGE_SHIFT); 171 pr_info("%2d) Start 0x%016lx End 0x%016lx Size %6ld MB\n", 172 i, start, start + (size - 1), size >> 20); 173 174 /* request memory resource */ 175 res->name = "System RAM"; 176 res->start = start; 177 res->end = start + size - 1; 178 res->flags = IORESOURCE_SYSTEM_RAM | IORESOURCE_BUSY; 179 request_resource(&iomem_resource, res); 180 } 181 182 sysram_resource_count = npmem_ranges; 183 184 /* 185 * For 32 bit kernels we limit the amount of memory we can 186 * support, in order to preserve enough kernel address space 187 * for other purposes. For 64 bit kernels we don't normally 188 * limit the memory, but this mechanism can be used to 189 * artificially limit the amount of memory (and it is written 190 * to work with multiple memory ranges). 191 */ 192 193 mem_limit_func(); /* check for "mem=" argument */ 194 195 mem_max = 0; 196 for (i = 0; i < npmem_ranges; i++) { 197 unsigned long rsize; 198 199 rsize = pmem_ranges[i].pages << PAGE_SHIFT; 200 if ((mem_max + rsize) > mem_limit) { 201 printk(KERN_WARNING "Memory truncated to %ld MB\n", mem_limit >> 20); 202 if (mem_max == mem_limit) 203 npmem_ranges = i; 204 else { 205 pmem_ranges[i].pages = (mem_limit >> PAGE_SHIFT) 206 - (mem_max >> PAGE_SHIFT); 207 npmem_ranges = i + 1; 208 mem_max = mem_limit; 209 } 210 break; 211 } 212 mem_max += rsize; 213 } 214 215 printk(KERN_INFO "Total Memory: %ld MB\n",mem_max >> 20); 216 217#ifndef CONFIG_SPARSEMEM 218 /* Merge the ranges, keeping track of the holes */ 219 { 220 unsigned long end_pfn; 221 unsigned long hole_pages; 222 223 npmem_holes = 0; 224 end_pfn = pmem_ranges[0].start_pfn + pmem_ranges[0].pages; 225 for (i = 1; i < npmem_ranges; i++) { 226 227 hole_pages = pmem_ranges[i].start_pfn - end_pfn; 228 if (hole_pages) { 229 pmem_holes[npmem_holes].start_pfn = end_pfn; 230 pmem_holes[npmem_holes++].pages = hole_pages; 231 end_pfn += hole_pages; 232 } 233 end_pfn += pmem_ranges[i].pages; 234 } 235 236 pmem_ranges[0].pages = end_pfn - pmem_ranges[0].start_pfn; 237 npmem_ranges = 1; 238 } 239#endif 240 241 /* 242 * Initialize and free the full range of memory in each range. 243 */ 244 245 max_pfn = 0; 246 for (i = 0; i < npmem_ranges; i++) { 247 unsigned long start_pfn; 248 unsigned long npages; 249 unsigned long start; 250 unsigned long size; 251 252 start_pfn = pmem_ranges[i].start_pfn; 253 npages = pmem_ranges[i].pages; 254 255 start = start_pfn << PAGE_SHIFT; 256 size = npages << PAGE_SHIFT; 257 258 /* add system RAM memblock */ 259 memblock_add(start, size); 260 261 if ((start_pfn + npages) > max_pfn) 262 max_pfn = start_pfn + npages; 263 } 264 265 /* 266 * We can't use memblock top-down allocations because we only 267 * created the initial mapping up to KERNEL_INITIAL_SIZE in 268 * the assembly bootup code. 269 */ 270 memblock_set_bottom_up(true); 271 272 /* IOMMU is always used to access "high mem" on those boxes 273 * that can support enough mem that a PCI device couldn't 274 * directly DMA to any physical addresses. 275 * ISA DMA support will need to revisit this. 276 */ 277 max_low_pfn = max_pfn; 278 279 /* reserve PAGE0 pdc memory, kernel text/data/bss & bootmap */ 280 281#define PDC_CONSOLE_IO_IODC_SIZE 32768 282 283 memblock_reserve(0UL, (unsigned long)(PAGE0->mem_free + 284 PDC_CONSOLE_IO_IODC_SIZE)); 285 memblock_reserve(__pa(KERNEL_BINARY_TEXT_START), 286 (unsigned long)(_end - KERNEL_BINARY_TEXT_START)); 287 288#ifndef CONFIG_SPARSEMEM 289 290 /* reserve the holes */ 291 292 for (i = 0; i < npmem_holes; i++) { 293 memblock_reserve((pmem_holes[i].start_pfn << PAGE_SHIFT), 294 (pmem_holes[i].pages << PAGE_SHIFT)); 295 } 296#endif 297 298#ifdef CONFIG_BLK_DEV_INITRD 299 if (initrd_start) { 300 printk(KERN_INFO "initrd: %08lx-%08lx\n", initrd_start, initrd_end); 301 if (__pa(initrd_start) < mem_max) { 302 unsigned long initrd_reserve; 303 304 if (__pa(initrd_end) > mem_max) { 305 initrd_reserve = mem_max - __pa(initrd_start); 306 } else { 307 initrd_reserve = initrd_end - initrd_start; 308 } 309 initrd_below_start_ok = 1; 310 printk(KERN_INFO "initrd: reserving %08lx-%08lx (mem_max %08lx)\n", __pa(initrd_start), __pa(initrd_start) + initrd_reserve, mem_max); 311 312 memblock_reserve(__pa(initrd_start), initrd_reserve); 313 } 314 } 315#endif 316 317 data_resource.start = virt_to_phys(&data_start); 318 data_resource.end = virt_to_phys(_end) - 1; 319 code_resource.start = virt_to_phys(_text); 320 code_resource.end = virt_to_phys(&data_start)-1; 321 322 /* We don't know which region the kernel will be in, so try 323 * all of them. 324 */ 325 for (i = 0; i < sysram_resource_count; i++) { 326 struct resource *res = &sysram_resources[i]; 327 request_resource(res, &code_resource); 328 request_resource(res, &data_resource); 329 } 330 request_resource(&sysram_resources[0], &pdcdata_resource); 331 332 /* Initialize Page Deallocation Table (PDT) and check for bad memory. */ 333 pdc_pdt_init(); 334 335 memblock_allow_resize(); 336 memblock_dump_all(); 337} 338 339static bool kernel_set_to_readonly; 340 341static void __ref map_pages(unsigned long start_vaddr, 342 unsigned long start_paddr, unsigned long size, 343 pgprot_t pgprot, int force) 344{ 345 pmd_t *pmd; 346 pte_t *pg_table; 347 unsigned long end_paddr; 348 unsigned long start_pmd; 349 unsigned long start_pte; 350 unsigned long tmp1; 351 unsigned long tmp2; 352 unsigned long address; 353 unsigned long vaddr; 354 unsigned long ro_start; 355 unsigned long ro_end; 356 unsigned long kernel_start, kernel_end; 357 358 ro_start = __pa((unsigned long)_text); 359 ro_end = __pa((unsigned long)&data_start); 360 kernel_start = __pa((unsigned long)&__init_begin); 361 kernel_end = __pa((unsigned long)&_end); 362 363 end_paddr = start_paddr + size; 364 365 /* for 2-level configuration PTRS_PER_PMD is 0 so start_pmd will be 0 */ 366 start_pmd = ((start_vaddr >> PMD_SHIFT) & (PTRS_PER_PMD - 1)); 367 start_pte = ((start_vaddr >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)); 368 369 address = start_paddr; 370 vaddr = start_vaddr; 371 while (address < end_paddr) { 372 pgd_t *pgd = pgd_offset_k(vaddr); 373 p4d_t *p4d = p4d_offset(pgd, vaddr); 374 pud_t *pud = pud_offset(p4d, vaddr); 375 376#if CONFIG_PGTABLE_LEVELS == 3 377 if (pud_none(*pud)) { 378 pmd = memblock_alloc(PAGE_SIZE << PMD_TABLE_ORDER, 379 PAGE_SIZE << PMD_TABLE_ORDER); 380 if (!pmd) 381 panic("pmd allocation failed.\n"); 382 pud_populate(NULL, pud, pmd); 383 } 384#endif 385 386 pmd = pmd_offset(pud, vaddr); 387 for (tmp1 = start_pmd; tmp1 < PTRS_PER_PMD; tmp1++, pmd++) { 388 if (pmd_none(*pmd)) { 389 pg_table = memblock_alloc(PAGE_SIZE, PAGE_SIZE); 390 if (!pg_table) 391 panic("page table allocation failed\n"); 392 pmd_populate_kernel(NULL, pmd, pg_table); 393 } 394 395 pg_table = pte_offset_kernel(pmd, vaddr); 396 for (tmp2 = start_pte; tmp2 < PTRS_PER_PTE; tmp2++, pg_table++) { 397 pte_t pte; 398 pgprot_t prot; 399 bool huge = false; 400 401 if (force) { 402 prot = pgprot; 403 } else if (address < kernel_start || address >= kernel_end) { 404 /* outside kernel memory */ 405 prot = PAGE_KERNEL; 406 } else if (!kernel_set_to_readonly) { 407 /* still initializing, allow writing to RO memory */ 408 prot = PAGE_KERNEL_RWX; 409 huge = true; 410 } else if (address >= ro_start) { 411 /* Code (ro) and Data areas */ 412 prot = (address < ro_end) ? 413 PAGE_KERNEL_EXEC : PAGE_KERNEL; 414 huge = true; 415 } else { 416 prot = PAGE_KERNEL; 417 } 418 419 pte = __mk_pte(address, prot); 420 if (huge) 421 pte = pte_mkhuge(pte); 422 423 if (address >= end_paddr) 424 break; 425 426 set_pte(pg_table, pte); 427 428 address += PAGE_SIZE; 429 vaddr += PAGE_SIZE; 430 } 431 start_pte = 0; 432 433 if (address >= end_paddr) 434 break; 435 } 436 start_pmd = 0; 437 } 438} 439 440void __init set_kernel_text_rw(int enable_read_write) 441{ 442 unsigned long start = (unsigned long) __init_begin; 443 unsigned long end = (unsigned long) &data_start; 444 445 map_pages(start, __pa(start), end-start, 446 PAGE_KERNEL_RWX, enable_read_write ? 1:0); 447 448 /* force the kernel to see the new page table entries */ 449 flush_cache_all(); 450 flush_tlb_all(); 451} 452 453void free_initmem(void) 454{ 455 unsigned long init_begin = (unsigned long)__init_begin; 456 unsigned long init_end = (unsigned long)__init_end; 457 unsigned long kernel_end = (unsigned long)&_end; 458 459 /* Remap kernel text and data, but do not touch init section yet. */ 460 kernel_set_to_readonly = true; 461 map_pages(init_end, __pa(init_end), kernel_end - init_end, 462 PAGE_KERNEL, 0); 463 464 /* The init text pages are marked R-X. We have to 465 * flush the icache and mark them RW- 466 * 467 * Do a dummy remap of the data section first (the data 468 * section is already PAGE_KERNEL) to pull in the TLB entries 469 * for map_kernel */ 470 map_pages(init_begin, __pa(init_begin), init_end - init_begin, 471 PAGE_KERNEL_RWX, 1); 472 /* now remap at PAGE_KERNEL since the TLB is pre-primed to execute 473 * map_pages */ 474 map_pages(init_begin, __pa(init_begin), init_end - init_begin, 475 PAGE_KERNEL, 1); 476 477 /* force the kernel to see the new TLB entries */ 478 __flush_tlb_range(0, init_begin, kernel_end); 479 480 /* finally dump all the instructions which were cached, since the 481 * pages are no-longer executable */ 482 flush_icache_range(init_begin, init_end); 483 484 free_initmem_default(POISON_FREE_INITMEM); 485 486 /* set up a new led state on systems shipped LED State panel */ 487 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_BCOMPLETE); 488} 489 490 491#ifdef CONFIG_STRICT_KERNEL_RWX 492void mark_rodata_ro(void) 493{ 494 /* rodata memory was already mapped with KERNEL_RO access rights by 495 pagetable_init() and map_pages(). No need to do additional stuff here */ 496 unsigned long roai_size = __end_ro_after_init - __start_ro_after_init; 497 498 pr_info("Write protected read-only-after-init data: %luk\n", roai_size >> 10); 499} 500#endif 501 502 503/* 504 * Just an arbitrary offset to serve as a "hole" between mapping areas 505 * (between top of physical memory and a potential pcxl dma mapping 506 * area, and below the vmalloc mapping area). 507 * 508 * The current 32K value just means that there will be a 32K "hole" 509 * between mapping areas. That means that any out-of-bounds memory 510 * accesses will hopefully be caught. The vmalloc() routines leaves 511 * a hole of 4kB between each vmalloced area for the same reason. 512 */ 513 514 /* Leave room for gateway page expansion */ 515#if KERNEL_MAP_START < GATEWAY_PAGE_SIZE 516#error KERNEL_MAP_START is in gateway reserved region 517#endif 518#define MAP_START (KERNEL_MAP_START) 519 520#define VM_MAP_OFFSET (32*1024) 521#define SET_MAP_OFFSET(x) ((void *)(((unsigned long)(x) + VM_MAP_OFFSET) \ 522 & ~(VM_MAP_OFFSET-1))) 523 524void *parisc_vmalloc_start __ro_after_init; 525EXPORT_SYMBOL(parisc_vmalloc_start); 526 527void __init mem_init(void) 528{ 529 /* Do sanity checks on IPC (compat) structures */ 530 BUILD_BUG_ON(sizeof(struct ipc64_perm) != 48); 531#ifndef CONFIG_64BIT 532 BUILD_BUG_ON(sizeof(struct semid64_ds) != 80); 533 BUILD_BUG_ON(sizeof(struct msqid64_ds) != 104); 534 BUILD_BUG_ON(sizeof(struct shmid64_ds) != 104); 535#endif 536#ifdef CONFIG_COMPAT 537 BUILD_BUG_ON(sizeof(struct compat_ipc64_perm) != sizeof(struct ipc64_perm)); 538 BUILD_BUG_ON(sizeof(struct compat_semid64_ds) != 80); 539 BUILD_BUG_ON(sizeof(struct compat_msqid64_ds) != 104); 540 BUILD_BUG_ON(sizeof(struct compat_shmid64_ds) != 104); 541#endif 542 543 /* Do sanity checks on page table constants */ 544 BUILD_BUG_ON(PTE_ENTRY_SIZE != sizeof(pte_t)); 545 BUILD_BUG_ON(PMD_ENTRY_SIZE != sizeof(pmd_t)); 546 BUILD_BUG_ON(PGD_ENTRY_SIZE != sizeof(pgd_t)); 547 BUILD_BUG_ON(PAGE_SHIFT + BITS_PER_PTE + BITS_PER_PMD + BITS_PER_PGD 548 > BITS_PER_LONG); 549#if CONFIG_PGTABLE_LEVELS == 3 550 BUILD_BUG_ON(PT_INITIAL > PTRS_PER_PMD); 551#else 552 BUILD_BUG_ON(PT_INITIAL > PTRS_PER_PGD); 553#endif 554 555#ifdef CONFIG_64BIT 556 /* avoid ldil_%L() asm statements to sign-extend into upper 32-bits */ 557 BUILD_BUG_ON(__PAGE_OFFSET >= 0x80000000); 558 BUILD_BUG_ON(TMPALIAS_MAP_START >= 0x80000000); 559#endif 560 561 high_memory = __va((max_pfn << PAGE_SHIFT)); 562 set_max_mapnr(max_low_pfn); 563 memblock_free_all(); 564 565#ifdef CONFIG_PA11 566 if (boot_cpu_data.cpu_type == pcxl2 || boot_cpu_data.cpu_type == pcxl) { 567 pcxl_dma_start = (unsigned long)SET_MAP_OFFSET(MAP_START); 568 parisc_vmalloc_start = SET_MAP_OFFSET(pcxl_dma_start 569 + PCXL_DMA_MAP_SIZE); 570 } else 571#endif 572 parisc_vmalloc_start = SET_MAP_OFFSET(MAP_START); 573 574#if 0 575 /* 576 * Do not expose the virtual kernel memory layout to userspace. 577 * But keep code for debugging purposes. 578 */ 579 printk("virtual kernel memory layout:\n" 580 " vmalloc : 0x%px - 0x%px (%4ld MB)\n" 581 " fixmap : 0x%px - 0x%px (%4ld kB)\n" 582 " memory : 0x%px - 0x%px (%4ld MB)\n" 583 " .init : 0x%px - 0x%px (%4ld kB)\n" 584 " .data : 0x%px - 0x%px (%4ld kB)\n" 585 " .text : 0x%px - 0x%px (%4ld kB)\n", 586 587 (void*)VMALLOC_START, (void*)VMALLOC_END, 588 (VMALLOC_END - VMALLOC_START) >> 20, 589 590 (void *)FIXMAP_START, (void *)(FIXMAP_START + FIXMAP_SIZE), 591 (unsigned long)(FIXMAP_SIZE / 1024), 592 593 __va(0), high_memory, 594 ((unsigned long)high_memory - (unsigned long)__va(0)) >> 20, 595 596 __init_begin, __init_end, 597 ((unsigned long)__init_end - (unsigned long)__init_begin) >> 10, 598 599 _etext, _edata, 600 ((unsigned long)_edata - (unsigned long)_etext) >> 10, 601 602 _text, _etext, 603 ((unsigned long)_etext - (unsigned long)_text) >> 10); 604#endif 605} 606 607unsigned long *empty_zero_page __ro_after_init; 608EXPORT_SYMBOL(empty_zero_page); 609 610/* 611 * pagetable_init() sets up the page tables 612 * 613 * Note that gateway_init() places the Linux gateway page at page 0. 614 * Since gateway pages cannot be dereferenced this has the desirable 615 * side effect of trapping those pesky NULL-reference errors in the 616 * kernel. 617 */ 618static void __init pagetable_init(void) 619{ 620 int range; 621 622 /* Map each physical memory range to its kernel vaddr */ 623 624 for (range = 0; range < npmem_ranges; range++) { 625 unsigned long start_paddr; 626 unsigned long size; 627 628 start_paddr = pmem_ranges[range].start_pfn << PAGE_SHIFT; 629 size = pmem_ranges[range].pages << PAGE_SHIFT; 630 631 map_pages((unsigned long)__va(start_paddr), start_paddr, 632 size, PAGE_KERNEL, 0); 633 } 634 635#ifdef CONFIG_BLK_DEV_INITRD 636 if (initrd_end && initrd_end > mem_limit) { 637 printk(KERN_INFO "initrd: mapping %08lx-%08lx\n", initrd_start, initrd_end); 638 map_pages(initrd_start, __pa(initrd_start), 639 initrd_end - initrd_start, PAGE_KERNEL, 0); 640 } 641#endif 642 643 empty_zero_page = memblock_alloc(PAGE_SIZE, PAGE_SIZE); 644 if (!empty_zero_page) 645 panic("zero page allocation failed.\n"); 646 647} 648 649static void __init gateway_init(void) 650{ 651 unsigned long linux_gateway_page_addr; 652 /* FIXME: This is 'const' in order to trick the compiler 653 into not treating it as DP-relative data. */ 654 extern void * const linux_gateway_page; 655 656 linux_gateway_page_addr = LINUX_GATEWAY_ADDR & PAGE_MASK; 657 658 /* 659 * Setup Linux Gateway page. 660 * 661 * The Linux gateway page will reside in kernel space (on virtual 662 * page 0), so it doesn't need to be aliased into user space. 663 */ 664 665 map_pages(linux_gateway_page_addr, __pa(&linux_gateway_page), 666 PAGE_SIZE, PAGE_GATEWAY, 1); 667} 668 669static void __init fixmap_init(void) 670{ 671 unsigned long addr = FIXMAP_START; 672 unsigned long end = FIXMAP_START + FIXMAP_SIZE; 673 pgd_t *pgd = pgd_offset_k(addr); 674 p4d_t *p4d = p4d_offset(pgd, addr); 675 pud_t *pud = pud_offset(p4d, addr); 676 pmd_t *pmd; 677 678 BUILD_BUG_ON(FIXMAP_SIZE > PMD_SIZE); 679 680#if CONFIG_PGTABLE_LEVELS == 3 681 if (pud_none(*pud)) { 682 pmd = memblock_alloc(PAGE_SIZE << PMD_TABLE_ORDER, 683 PAGE_SIZE << PMD_TABLE_ORDER); 684 if (!pmd) 685 panic("fixmap: pmd allocation failed.\n"); 686 pud_populate(NULL, pud, pmd); 687 } 688#endif 689 690 pmd = pmd_offset(pud, addr); 691 do { 692 pte_t *pte = memblock_alloc(PAGE_SIZE, PAGE_SIZE); 693 if (!pte) 694 panic("fixmap: pte allocation failed.\n"); 695 696 pmd_populate_kernel(&init_mm, pmd, pte); 697 698 addr += PAGE_SIZE; 699 } while (addr < end); 700} 701 702static void __init parisc_bootmem_free(void) 703{ 704 unsigned long max_zone_pfn[MAX_NR_ZONES] = { 0, }; 705 706 max_zone_pfn[0] = memblock_end_of_DRAM(); 707 708 free_area_init(max_zone_pfn); 709} 710 711void __init paging_init(void) 712{ 713 setup_bootmem(); 714 pagetable_init(); 715 gateway_init(); 716 fixmap_init(); 717 flush_cache_all_local(); /* start with known state */ 718 flush_tlb_all_local(NULL); 719 720 sparse_init(); 721 parisc_bootmem_free(); 722} 723 724static void alloc_btlb(unsigned long start, unsigned long end, int *slot, 725 unsigned long entry_info) 726{ 727 const int slot_max = btlb_info.fixed_range_info.num_comb; 728 int min_num_pages = btlb_info.min_size; 729 unsigned long size; 730 731 /* map at minimum 4 pages */ 732 if (min_num_pages < 4) 733 min_num_pages = 4; 734 735 size = HUGEPAGE_SIZE; 736 while (start < end && *slot < slot_max && size >= PAGE_SIZE) { 737 /* starting address must have same alignment as size! */ 738 /* if correctly aligned and fits in double size, increase */ 739 if (((start & (2 * size - 1)) == 0) && 740 (end - start) >= (2 * size)) { 741 size <<= 1; 742 continue; 743 } 744 /* if current size alignment is too big, try smaller size */ 745 if ((start & (size - 1)) != 0) { 746 size >>= 1; 747 continue; 748 } 749 if ((end - start) >= size) { 750 if ((size >> PAGE_SHIFT) >= min_num_pages) 751 pdc_btlb_insert(start >> PAGE_SHIFT, __pa(start) >> PAGE_SHIFT, 752 size >> PAGE_SHIFT, entry_info, *slot); 753 (*slot)++; 754 start += size; 755 continue; 756 } 757 size /= 2; 758 continue; 759 } 760} 761 762void btlb_init_per_cpu(void) 763{ 764 unsigned long s, t, e; 765 int slot; 766 767 /* BTLBs are not available on 64-bit CPUs */ 768 if (IS_ENABLED(CONFIG_PA20)) 769 return; 770 else if (pdc_btlb_info(&btlb_info) < 0) { 771 memset(&btlb_info, 0, sizeof btlb_info); 772 } 773 774 /* insert BLTLBs for code and data segments */ 775 s = (uintptr_t) dereference_function_descriptor(&_stext); 776 e = (uintptr_t) dereference_function_descriptor(&_etext); 777 t = (uintptr_t) dereference_function_descriptor(&_sdata); 778 BUG_ON(t != e); 779 780 /* code segments */ 781 slot = 0; 782 alloc_btlb(s, e, &slot, 0x13800000); 783 784 /* sanity check */ 785 t = (uintptr_t) dereference_function_descriptor(&_edata); 786 e = (uintptr_t) dereference_function_descriptor(&__bss_start); 787 BUG_ON(t != e); 788 789 /* data segments */ 790 s = (uintptr_t) dereference_function_descriptor(&_sdata); 791 e = (uintptr_t) dereference_function_descriptor(&__bss_stop); 792 alloc_btlb(s, e, &slot, 0x11800000); 793} 794 795#ifdef CONFIG_PA20 796 797/* 798 * Currently, all PA20 chips have 18 bit protection IDs, which is the 799 * limiting factor (space ids are 32 bits). 800 */ 801 802#define NR_SPACE_IDS 262144 803 804#else 805 806/* 807 * Currently we have a one-to-one relationship between space IDs and 808 * protection IDs. Older parisc chips (PCXS, PCXT, PCXL, PCXL2) only 809 * support 15 bit protection IDs, so that is the limiting factor. 810 * PCXT' has 18 bit protection IDs, but only 16 bit spaceids, so it's 811 * probably not worth the effort for a special case here. 812 */ 813 814#define NR_SPACE_IDS 32768 815 816#endif /* !CONFIG_PA20 */ 817 818#define RECYCLE_THRESHOLD (NR_SPACE_IDS / 2) 819#define SID_ARRAY_SIZE (NR_SPACE_IDS / (8 * sizeof(long))) 820 821static unsigned long space_id[SID_ARRAY_SIZE] = { 1 }; /* disallow space 0 */ 822static unsigned long dirty_space_id[SID_ARRAY_SIZE]; 823static unsigned long space_id_index; 824static unsigned long free_space_ids = NR_SPACE_IDS - 1; 825static unsigned long dirty_space_ids; 826 827static DEFINE_SPINLOCK(sid_lock); 828 829unsigned long alloc_sid(void) 830{ 831 unsigned long index; 832 833 spin_lock(&sid_lock); 834 835 if (free_space_ids == 0) { 836 if (dirty_space_ids != 0) { 837 spin_unlock(&sid_lock); 838 flush_tlb_all(); /* flush_tlb_all() calls recycle_sids() */ 839 spin_lock(&sid_lock); 840 } 841 BUG_ON(free_space_ids == 0); 842 } 843 844 free_space_ids--; 845 846 index = find_next_zero_bit(space_id, NR_SPACE_IDS, space_id_index); 847 space_id[BIT_WORD(index)] |= BIT_MASK(index); 848 space_id_index = index; 849 850 spin_unlock(&sid_lock); 851 852 return index << SPACEID_SHIFT; 853} 854 855void free_sid(unsigned long spaceid) 856{ 857 unsigned long index = spaceid >> SPACEID_SHIFT; 858 unsigned long *dirty_space_offset, mask; 859 860 dirty_space_offset = &dirty_space_id[BIT_WORD(index)]; 861 mask = BIT_MASK(index); 862 863 spin_lock(&sid_lock); 864 865 BUG_ON(*dirty_space_offset & mask); /* attempt to free space id twice */ 866 867 *dirty_space_offset |= mask; 868 dirty_space_ids++; 869 870 spin_unlock(&sid_lock); 871} 872 873 874#ifdef CONFIG_SMP 875static void get_dirty_sids(unsigned long *ndirtyptr,unsigned long *dirty_array) 876{ 877 int i; 878 879 /* NOTE: sid_lock must be held upon entry */ 880 881 *ndirtyptr = dirty_space_ids; 882 if (dirty_space_ids != 0) { 883 for (i = 0; i < SID_ARRAY_SIZE; i++) { 884 dirty_array[i] = dirty_space_id[i]; 885 dirty_space_id[i] = 0; 886 } 887 dirty_space_ids = 0; 888 } 889 890 return; 891} 892 893static void recycle_sids(unsigned long ndirty,unsigned long *dirty_array) 894{ 895 int i; 896 897 /* NOTE: sid_lock must be held upon entry */ 898 899 if (ndirty != 0) { 900 for (i = 0; i < SID_ARRAY_SIZE; i++) { 901 space_id[i] ^= dirty_array[i]; 902 } 903 904 free_space_ids += ndirty; 905 space_id_index = 0; 906 } 907} 908 909#else /* CONFIG_SMP */ 910 911static void recycle_sids(void) 912{ 913 int i; 914 915 /* NOTE: sid_lock must be held upon entry */ 916 917 if (dirty_space_ids != 0) { 918 for (i = 0; i < SID_ARRAY_SIZE; i++) { 919 space_id[i] ^= dirty_space_id[i]; 920 dirty_space_id[i] = 0; 921 } 922 923 free_space_ids += dirty_space_ids; 924 dirty_space_ids = 0; 925 space_id_index = 0; 926 } 927} 928#endif 929 930/* 931 * flush_tlb_all() calls recycle_sids(), since whenever the entire tlb is 932 * purged, we can safely reuse the space ids that were released but 933 * not flushed from the tlb. 934 */ 935 936#ifdef CONFIG_SMP 937 938static unsigned long recycle_ndirty; 939static unsigned long recycle_dirty_array[SID_ARRAY_SIZE]; 940static unsigned int recycle_inuse; 941 942void flush_tlb_all(void) 943{ 944 int do_recycle; 945 946 do_recycle = 0; 947 spin_lock(&sid_lock); 948 __inc_irq_stat(irq_tlb_count); 949 if (dirty_space_ids > RECYCLE_THRESHOLD) { 950 BUG_ON(recycle_inuse); /* FIXME: Use a semaphore/wait queue here */ 951 get_dirty_sids(&recycle_ndirty,recycle_dirty_array); 952 recycle_inuse++; 953 do_recycle++; 954 } 955 spin_unlock(&sid_lock); 956 on_each_cpu(flush_tlb_all_local, NULL, 1); 957 if (do_recycle) { 958 spin_lock(&sid_lock); 959 recycle_sids(recycle_ndirty,recycle_dirty_array); 960 recycle_inuse = 0; 961 spin_unlock(&sid_lock); 962 } 963} 964#else 965void flush_tlb_all(void) 966{ 967 spin_lock(&sid_lock); 968 __inc_irq_stat(irq_tlb_count); 969 flush_tlb_all_local(NULL); 970 recycle_sids(); 971 spin_unlock(&sid_lock); 972} 973#endif 974 975static const pgprot_t protection_map[16] = { 976 [VM_NONE] = PAGE_NONE, 977 [VM_READ] = PAGE_READONLY, 978 [VM_WRITE] = PAGE_NONE, 979 [VM_WRITE | VM_READ] = PAGE_READONLY, 980 [VM_EXEC] = PAGE_EXECREAD, 981 [VM_EXEC | VM_READ] = PAGE_EXECREAD, 982 [VM_EXEC | VM_WRITE] = PAGE_EXECREAD, 983 [VM_EXEC | VM_WRITE | VM_READ] = PAGE_EXECREAD, 984 [VM_SHARED] = PAGE_NONE, 985 [VM_SHARED | VM_READ] = PAGE_READONLY, 986 [VM_SHARED | VM_WRITE] = PAGE_WRITEONLY, 987 [VM_SHARED | VM_WRITE | VM_READ] = PAGE_SHARED, 988 [VM_SHARED | VM_EXEC] = PAGE_EXECREAD, 989 [VM_SHARED | VM_EXEC | VM_READ] = PAGE_EXECREAD, 990 [VM_SHARED | VM_EXEC | VM_WRITE] = PAGE_RWX, 991 [VM_SHARED | VM_EXEC | VM_WRITE | VM_READ] = PAGE_RWX 992}; 993DECLARE_VM_GET_PAGE_PROT 994