1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright (C) 2000, 2001, 2002, 2003, 2004 Broadcom Corporation
4 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
5 */
6
7/*
8 * Setup code for the SWARM board
9 */
10
11#include <linux/spinlock.h>
12#include <linux/mm.h>
13#include <linux/memblock.h>
14#include <linux/init.h>
15#include <linux/kernel.h>
16#include <linux/screen_info.h>
17#include <linux/initrd.h>
18
19#include <asm/irq.h>
20#include <asm/io.h>
21#include <asm/bootinfo.h>
22#include <asm/mipsregs.h>
23#include <asm/reboot.h>
24#include <asm/time.h>
25#include <asm/traps.h>
26#include <asm/sibyte/sb1250.h>
27#ifdef CONFIG_SIBYTE_BCM1x80
28#include <asm/sibyte/bcm1480_regs.h>
29#elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
30#include <asm/sibyte/sb1250_regs.h>
31#else
32#error invalid SiByte board configuration
33#endif
34#include <asm/sibyte/sb1250_genbus.h>
35#include <asm/sibyte/board.h>
36
37#ifdef CONFIG_SIBYTE_BCM1x80
38extern void bcm1480_setup(void);
39#elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
40extern void sb1250_setup(void);
41#else
42#error invalid SiByte board configuration
43#endif
44
45extern int xicor_probe(void);
46extern int xicor_set_time(time64_t);
47extern time64_t xicor_get_time(void);
48
49extern int m41t81_probe(void);
50extern int m41t81_set_time(time64_t);
51extern time64_t m41t81_get_time(void);
52
53const char *get_system_type(void)
54{
55	return "SiByte " SIBYTE_BOARD_NAME;
56}
57
58int swarm_be_handler(struct pt_regs *regs, int is_fixup)
59{
60	if (!is_fixup && (regs->cp0_cause & 4)) {
61		/* Data bus error - print PA */
62		printk("DBE physical address: %010Lx\n",
63		       __read_64bit_c0_register($26, 1));
64	}
65	return is_fixup ? MIPS_BE_FIXUP : MIPS_BE_FATAL;
66}
67
68enum swarm_rtc_type {
69	RTC_NONE,
70	RTC_XICOR,
71	RTC_M41T81,
72};
73
74enum swarm_rtc_type swarm_rtc_type;
75
76void read_persistent_clock64(struct timespec64 *ts)
77{
78	time64_t sec;
79
80	switch (swarm_rtc_type) {
81	case RTC_XICOR:
82		sec = xicor_get_time();
83		break;
84
85	case RTC_M41T81:
86		sec = m41t81_get_time();
87		break;
88
89	case RTC_NONE:
90	default:
91		sec = mktime64(2000, 1, 1, 0, 0, 0);
92		break;
93	}
94	ts->tv_sec = sec;
95	ts->tv_nsec = 0;
96}
97
98int update_persistent_clock64(struct timespec64 now)
99{
100	time64_t sec = now.tv_sec;
101
102	switch (swarm_rtc_type) {
103	case RTC_XICOR:
104		return xicor_set_time(sec);
105
106	case RTC_M41T81:
107		return m41t81_set_time(sec);
108
109	case RTC_NONE:
110	default:
111		return -1;
112	}
113}
114
115void __init plat_mem_setup(void)
116{
117#ifdef CONFIG_SIBYTE_BCM1x80
118	bcm1480_setup();
119#elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
120	sb1250_setup();
121#else
122#error invalid SiByte board configuration
123#endif
124
125	mips_set_be_handler(swarm_be_handler);
126
127	if (xicor_probe())
128		swarm_rtc_type = RTC_XICOR;
129	if (m41t81_probe())
130		swarm_rtc_type = RTC_M41T81;
131
132#ifdef CONFIG_VT
133	screen_info = (struct screen_info) {
134		.orig_video_page	= 52,
135		.orig_video_mode	= 3,
136		.orig_video_cols	= 80,
137		.flags			= 12,
138		.orig_video_ega_bx	= 3,
139		.orig_video_lines	= 25,
140		.orig_video_isVGA	= 0x22,
141		.orig_video_points	= 16,
142       };
143       /* XXXKW for CFE, get lines/cols from environment */
144#endif
145}
146
147#ifdef LEDS_PHYS
148
149void setleds(char *str)
150{
151	void *reg;
152	int i;
153
154	for (i = 0; i < 4; i++) {
155		reg = IOADDR(LEDS_PHYS) + 0x20 + ((3 - i) << 3);
156
157		if (!str[i])
158			writeb(' ', reg);
159		else
160			writeb(str[i], reg);
161	}
162}
163
164#endif /* LEDS_PHYS */
165