1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 *
4 *  Copyright (C) 2010 John Crispin <john@phrozen.org>
5 */
6
7#include <linux/types.h>
8#include <linux/pci.h>
9#include <linux/kernel.h>
10#include <linux/delay.h>
11#include <linux/mm.h>
12#include <asm/addrspace.h>
13#include <linux/vmalloc.h>
14
15#include <lantiq_soc.h>
16
17#include "pci-lantiq.h"
18
19#define LTQ_PCI_CFG_BUSNUM_SHF 16
20#define LTQ_PCI_CFG_DEVNUM_SHF 11
21#define LTQ_PCI_CFG_FUNNUM_SHF 8
22
23#define PCI_ACCESS_READ	 0
24#define PCI_ACCESS_WRITE 1
25
26static int ltq_pci_config_access(unsigned char access_type, struct pci_bus *bus,
27	unsigned int devfn, unsigned int where, u32 *data)
28{
29	unsigned long cfg_base;
30	unsigned long flags;
31	u32 temp;
32
33	/* we support slot from 0 to 15 dev_fn & 0x68 (AD29) is the
34	   SoC itself */
35	if ((bus->number != 0) || ((devfn & 0xf8) > 0x78)
36		|| ((devfn & 0xf8) == 0) || ((devfn & 0xf8) == 0x68))
37		return 1;
38
39	spin_lock_irqsave(&ebu_lock, flags);
40
41	cfg_base = (unsigned long) ltq_pci_mapped_cfg;
42	cfg_base |= (bus->number << LTQ_PCI_CFG_BUSNUM_SHF) | (devfn <<
43			LTQ_PCI_CFG_FUNNUM_SHF) | (where & ~0x3);
44
45	/* Perform access */
46	if (access_type == PCI_ACCESS_WRITE) {
47		ltq_w32(swab32(*data), ((u32 *)cfg_base));
48	} else {
49		*data = ltq_r32(((u32 *)(cfg_base)));
50		*data = swab32(*data);
51	}
52	wmb();
53
54	/* clean possible Master abort */
55	cfg_base = (unsigned long) ltq_pci_mapped_cfg;
56	cfg_base |= (0x0 << LTQ_PCI_CFG_FUNNUM_SHF) + 4;
57	temp = ltq_r32(((u32 *)(cfg_base)));
58	temp = swab32(temp);
59	cfg_base = (unsigned long) ltq_pci_mapped_cfg;
60	cfg_base |= (0x68 << LTQ_PCI_CFG_FUNNUM_SHF) + 4;
61	ltq_w32(temp, ((u32 *)cfg_base));
62
63	spin_unlock_irqrestore(&ebu_lock, flags);
64
65	if (((*data) == 0xffffffff) && (access_type == PCI_ACCESS_READ))
66		return 1;
67
68	return 0;
69}
70
71int ltq_pci_read_config_dword(struct pci_bus *bus, unsigned int devfn,
72	int where, int size, u32 *val)
73{
74	u32 data = 0;
75
76	if (ltq_pci_config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
77		return PCIBIOS_DEVICE_NOT_FOUND;
78
79	if (size == 1)
80		*val = (data >> ((where & 3) << 3)) & 0xff;
81	else if (size == 2)
82		*val = (data >> ((where & 3) << 3)) & 0xffff;
83	else
84		*val = data;
85
86	return PCIBIOS_SUCCESSFUL;
87}
88
89int ltq_pci_write_config_dword(struct pci_bus *bus, unsigned int devfn,
90	int where, int size, u32 val)
91{
92	u32 data = 0;
93
94	if (size == 4) {
95		data = val;
96	} else {
97		if (ltq_pci_config_access(PCI_ACCESS_READ, bus,
98				devfn, where, &data))
99			return PCIBIOS_DEVICE_NOT_FOUND;
100
101		if (size == 1)
102			data = (data & ~(0xff << ((where & 3) << 3))) |
103				(val << ((where & 3) << 3));
104		else if (size == 2)
105			data = (data & ~(0xffff << ((where & 3) << 3))) |
106				(val << ((where & 3) << 3));
107	}
108
109	if (ltq_pci_config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data))
110		return PCIBIOS_DEVICE_NOT_FOUND;
111
112	return PCIBIOS_SUCCESSFUL;
113}
114