162306a36Sopenharmony_ci/* 262306a36Sopenharmony_ci * This file is subject to the terms and conditions of the GNU General Public 362306a36Sopenharmony_ci * License. See the file "COPYING" in the main directory of this archive 462306a36Sopenharmony_ci * for more details. 562306a36Sopenharmony_ci * 662306a36Sopenharmony_ci * Copyright (C) 2006, 07 MIPS Technologies, Inc. 762306a36Sopenharmony_ci * written by Ralf Baechle (ralf@linux-mips.org) 862306a36Sopenharmony_ci * written by Ralf Baechle <ralf@linux-mips.org> 962306a36Sopenharmony_ci * 1062306a36Sopenharmony_ci * Copyright (C) 2008 Wind River Systems, Inc. 1162306a36Sopenharmony_ci * updated by Tiejun Chen <tiejun.chen@windriver.com> 1262306a36Sopenharmony_ci * 1362306a36Sopenharmony_ci * 1. Probe driver for the Malta's UART ports: 1462306a36Sopenharmony_ci * 1562306a36Sopenharmony_ci * o 2 ports in the SMC SuperIO 1662306a36Sopenharmony_ci * o 1 port in the CBUS UART, a discrete 16550 which normally is only used 1762306a36Sopenharmony_ci * for bringups. 1862306a36Sopenharmony_ci * 1962306a36Sopenharmony_ci * We don't use 8250_platform.c on Malta as it would result in the CBUS 2062306a36Sopenharmony_ci * UART becoming ttyS0. 2162306a36Sopenharmony_ci * 2262306a36Sopenharmony_ci * 2. Register RTC-CMOS platform device on Malta. 2362306a36Sopenharmony_ci */ 2462306a36Sopenharmony_ci#include <linux/init.h> 2562306a36Sopenharmony_ci#include <linux/serial_8250.h> 2662306a36Sopenharmony_ci#include <linux/irq.h> 2762306a36Sopenharmony_ci#include <linux/platform_device.h> 2862306a36Sopenharmony_ci#include <asm/mips-boards/maltaint.h> 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ci#define SMC_PORT(base, int) \ 3162306a36Sopenharmony_ci{ \ 3262306a36Sopenharmony_ci .iobase = base, \ 3362306a36Sopenharmony_ci .irq = int, \ 3462306a36Sopenharmony_ci .uartclk = 1843200, \ 3562306a36Sopenharmony_ci .iotype = UPIO_PORT, \ 3662306a36Sopenharmony_ci .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | \ 3762306a36Sopenharmony_ci UPF_MAGIC_MULTIPLIER, \ 3862306a36Sopenharmony_ci .regshift = 0, \ 3962306a36Sopenharmony_ci} 4062306a36Sopenharmony_ci 4162306a36Sopenharmony_ci#define CBUS_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP) 4262306a36Sopenharmony_ci 4362306a36Sopenharmony_cistatic struct plat_serial8250_port uart8250_data[] = { 4462306a36Sopenharmony_ci SMC_PORT(0x3F8, 4), 4562306a36Sopenharmony_ci SMC_PORT(0x2F8, 3), 4662306a36Sopenharmony_ci { 4762306a36Sopenharmony_ci .mapbase = 0x1f000900, /* The CBUS UART */ 4862306a36Sopenharmony_ci .irq = MIPS_CPU_IRQ_BASE + MIPSCPU_INT_MB2, 4962306a36Sopenharmony_ci .uartclk = 3686400, /* Twice the usual clk! */ 5062306a36Sopenharmony_ci .iotype = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN) ? 5162306a36Sopenharmony_ci UPIO_MEM32BE : UPIO_MEM32, 5262306a36Sopenharmony_ci .flags = CBUS_UART_FLAGS, 5362306a36Sopenharmony_ci .regshift = 3, 5462306a36Sopenharmony_ci }, 5562306a36Sopenharmony_ci { }, 5662306a36Sopenharmony_ci}; 5762306a36Sopenharmony_ci 5862306a36Sopenharmony_cistatic struct platform_device malta_uart8250_device = { 5962306a36Sopenharmony_ci .name = "serial8250", 6062306a36Sopenharmony_ci .id = PLAT8250_DEV_PLATFORM, 6162306a36Sopenharmony_ci .dev = { 6262306a36Sopenharmony_ci .platform_data = uart8250_data, 6362306a36Sopenharmony_ci }, 6462306a36Sopenharmony_ci}; 6562306a36Sopenharmony_ci 6662306a36Sopenharmony_cistatic struct platform_device *malta_devices[] __initdata = { 6762306a36Sopenharmony_ci &malta_uart8250_device, 6862306a36Sopenharmony_ci}; 6962306a36Sopenharmony_ci 7062306a36Sopenharmony_cistatic int __init malta_add_devices(void) 7162306a36Sopenharmony_ci{ 7262306a36Sopenharmony_ci return platform_add_devices(malta_devices, ARRAY_SIZE(malta_devices)); 7362306a36Sopenharmony_ci} 7462306a36Sopenharmony_ci 7562306a36Sopenharmony_cidevice_initcall(malta_add_devices); 76