162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology 462306a36Sopenharmony_ci * Author: Fuxin Zhang, zhangfx@lemote.com 562306a36Sopenharmony_ci */ 662306a36Sopenharmony_ci#include <linux/pci.h> 762306a36Sopenharmony_ci 862306a36Sopenharmony_ci#include <pci.h> 962306a36Sopenharmony_ci#include <loongson.h> 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_cistatic struct resource loongson_pci_mem_resource = { 1262306a36Sopenharmony_ci .name = "pci memory space", 1362306a36Sopenharmony_ci .start = LOONGSON_PCI_MEM_START, 1462306a36Sopenharmony_ci .end = LOONGSON_PCI_MEM_END, 1562306a36Sopenharmony_ci .flags = IORESOURCE_MEM, 1662306a36Sopenharmony_ci}; 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_cistatic struct resource loongson_pci_io_resource = { 1962306a36Sopenharmony_ci .name = "pci io space", 2062306a36Sopenharmony_ci .start = LOONGSON_PCI_IO_START, 2162306a36Sopenharmony_ci .end = IO_SPACE_LIMIT, 2262306a36Sopenharmony_ci .flags = IORESOURCE_IO, 2362306a36Sopenharmony_ci}; 2462306a36Sopenharmony_ci 2562306a36Sopenharmony_cistatic struct pci_controller loongson_pci_controller = { 2662306a36Sopenharmony_ci .pci_ops = &loongson_pci_ops, 2762306a36Sopenharmony_ci .io_resource = &loongson_pci_io_resource, 2862306a36Sopenharmony_ci .mem_resource = &loongson_pci_mem_resource, 2962306a36Sopenharmony_ci .mem_offset = 0x00000000UL, 3062306a36Sopenharmony_ci .io_offset = 0x00000000UL, 3162306a36Sopenharmony_ci}; 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_cistatic void __init setup_pcimap(void) 3462306a36Sopenharmony_ci{ 3562306a36Sopenharmony_ci /* 3662306a36Sopenharmony_ci * local to PCI mapping for CPU accessing PCI space 3762306a36Sopenharmony_ci * CPU address space [256M,448M] is window for accessing pci space 3862306a36Sopenharmony_ci * we set pcimap_lo[0,1,2] to map it to pci space[0M,64M], [320M,448M] 3962306a36Sopenharmony_ci * 4062306a36Sopenharmony_ci * pcimap: PCI_MAP2 PCI_Mem_Lo2 PCI_Mem_Lo1 PCI_Mem_Lo0 4162306a36Sopenharmony_ci * [<2G] [384M,448M] [320M,384M] [0M,64M] 4262306a36Sopenharmony_ci */ 4362306a36Sopenharmony_ci LOONGSON_PCIMAP = LOONGSON_PCIMAP_PCIMAP_2 | 4462306a36Sopenharmony_ci LOONGSON_PCIMAP_WIN(2, LOONGSON_PCILO2_BASE) | 4562306a36Sopenharmony_ci LOONGSON_PCIMAP_WIN(1, LOONGSON_PCILO1_BASE) | 4662306a36Sopenharmony_ci LOONGSON_PCIMAP_WIN(0, 0); 4762306a36Sopenharmony_ci 4862306a36Sopenharmony_ci /* 4962306a36Sopenharmony_ci * PCI-DMA to local mapping: [2G,2G+256M] -> [0M,256M] 5062306a36Sopenharmony_ci */ 5162306a36Sopenharmony_ci LOONGSON_PCIBASE0 = 0x80000000ul; /* base: 2G -> mmap: 0M */ 5262306a36Sopenharmony_ci /* size: 256M, burst transmission, pre-fetch enable, 64bit */ 5362306a36Sopenharmony_ci LOONGSON_PCI_HIT0_SEL_L = 0xc000000cul; 5462306a36Sopenharmony_ci LOONGSON_PCI_HIT0_SEL_H = 0xfffffffful; 5562306a36Sopenharmony_ci LOONGSON_PCI_HIT1_SEL_L = 0x00000006ul; /* set this BAR as invalid */ 5662306a36Sopenharmony_ci LOONGSON_PCI_HIT1_SEL_H = 0x00000000ul; 5762306a36Sopenharmony_ci LOONGSON_PCI_HIT2_SEL_L = 0x00000006ul; /* set this BAR as invalid */ 5862306a36Sopenharmony_ci LOONGSON_PCI_HIT2_SEL_H = 0x00000000ul; 5962306a36Sopenharmony_ci 6062306a36Sopenharmony_ci /* avoid deadlock of PCI reading/writing lock operation */ 6162306a36Sopenharmony_ci LOONGSON_PCI_ISR4C = 0xd2000001ul; 6262306a36Sopenharmony_ci 6362306a36Sopenharmony_ci /* can not change gnt to break pci transfer when device's gnt not 6462306a36Sopenharmony_ci deassert for some broken device */ 6562306a36Sopenharmony_ci LOONGSON_PXARB_CFG = 0x00fe0105ul; 6662306a36Sopenharmony_ci 6762306a36Sopenharmony_ci#ifdef CONFIG_CPU_SUPPORTS_ADDRWINCFG 6862306a36Sopenharmony_ci /* 6962306a36Sopenharmony_ci * set cpu addr window2 to map CPU address space to PCI address space 7062306a36Sopenharmony_ci */ 7162306a36Sopenharmony_ci LOONGSON_ADDRWIN_CPUTOPCI(ADDRWIN_WIN2, LOONGSON_CPU_MEM_SRC, 7262306a36Sopenharmony_ci LOONGSON_PCI_MEM_DST, MMAP_CPUTOPCI_SIZE); 7362306a36Sopenharmony_ci#endif 7462306a36Sopenharmony_ci} 7562306a36Sopenharmony_ci 7662306a36Sopenharmony_cistatic int __init pcibios_init(void) 7762306a36Sopenharmony_ci{ 7862306a36Sopenharmony_ci setup_pcimap(); 7962306a36Sopenharmony_ci 8062306a36Sopenharmony_ci loongson_pci_controller.io_map_base = mips_io_port_base; 8162306a36Sopenharmony_ci register_pci_controller(&loongson_pci_controller); 8262306a36Sopenharmony_ci 8362306a36Sopenharmony_ci 8462306a36Sopenharmony_ci return 0; 8562306a36Sopenharmony_ci} 8662306a36Sopenharmony_ci 8762306a36Sopenharmony_ciarch_initcall(pcibios_init); 88