162306a36Sopenharmony_ci/* 262306a36Sopenharmony_ci * This file is subject to the terms and conditions of the GNU General Public 362306a36Sopenharmony_ci * License. See the file "COPYING" in the main directory of this archive 462306a36Sopenharmony_ci * for more details. 562306a36Sopenharmony_ci * 662306a36Sopenharmony_ci * Copyright (C) 1994, 95, 96, 97, 98, 99, 2003, 06 by Ralf Baechle 762306a36Sopenharmony_ci * Copyright (C) 1996 by Paul M. Antoine 862306a36Sopenharmony_ci * Copyright (C) 1999 Silicon Graphics 962306a36Sopenharmony_ci * Kevin D. Kissell, kevink@mips.org and Carsten Langgaard, carstenl@mips.com 1062306a36Sopenharmony_ci * Copyright (C) 2000 MIPS Technologies, Inc. 1162306a36Sopenharmony_ci */ 1262306a36Sopenharmony_ci#ifndef _ASM_SWITCH_TO_H 1362306a36Sopenharmony_ci#define _ASM_SWITCH_TO_H 1462306a36Sopenharmony_ci 1562306a36Sopenharmony_ci#include <asm/cpu-features.h> 1662306a36Sopenharmony_ci#include <asm/watch.h> 1762306a36Sopenharmony_ci#include <asm/dsp.h> 1862306a36Sopenharmony_ci#include <asm/cop2.h> 1962306a36Sopenharmony_ci#include <asm/fpu.h> 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_cistruct task_struct; 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_ci/** 2462306a36Sopenharmony_ci * resume - resume execution of a task 2562306a36Sopenharmony_ci * @prev: The task previously executed. 2662306a36Sopenharmony_ci * @next: The task to begin executing. 2762306a36Sopenharmony_ci * @next_ti: task_thread_info(next). 2862306a36Sopenharmony_ci * 2962306a36Sopenharmony_ci * This function is used whilst scheduling to save the context of prev & load 3062306a36Sopenharmony_ci * the context of next. Returns prev. 3162306a36Sopenharmony_ci */ 3262306a36Sopenharmony_ciextern asmlinkage struct task_struct *resume(struct task_struct *prev, 3362306a36Sopenharmony_ci struct task_struct *next, struct thread_info *next_ti); 3462306a36Sopenharmony_ci 3562306a36Sopenharmony_ciextern unsigned int ll_bit; 3662306a36Sopenharmony_ciextern struct task_struct *ll_task; 3762306a36Sopenharmony_ci 3862306a36Sopenharmony_ci#ifdef CONFIG_MIPS_MT_FPAFF 3962306a36Sopenharmony_ci 4062306a36Sopenharmony_ci/* 4162306a36Sopenharmony_ci * Handle the scheduler resume end of FPU affinity management. We do this 4262306a36Sopenharmony_ci * inline to try to keep the overhead down. If we have been forced to run on 4362306a36Sopenharmony_ci * a "CPU" with an FPU because of a previous high level of FP computation, 4462306a36Sopenharmony_ci * but did not actually use the FPU during the most recent time-slice (CU1 4562306a36Sopenharmony_ci * isn't set), we undo the restriction on cpus_mask. 4662306a36Sopenharmony_ci * 4762306a36Sopenharmony_ci * We're not calling set_cpus_allowed() here, because we have no need to 4862306a36Sopenharmony_ci * force prompt migration - we're already switching the current CPU to a 4962306a36Sopenharmony_ci * different thread. 5062306a36Sopenharmony_ci */ 5162306a36Sopenharmony_ci 5262306a36Sopenharmony_ci#define __mips_mt_fpaff_switch_to(prev) \ 5362306a36Sopenharmony_cido { \ 5462306a36Sopenharmony_ci struct thread_info *__prev_ti = task_thread_info(prev); \ 5562306a36Sopenharmony_ci \ 5662306a36Sopenharmony_ci if (cpu_has_fpu && \ 5762306a36Sopenharmony_ci test_ti_thread_flag(__prev_ti, TIF_FPUBOUND) && \ 5862306a36Sopenharmony_ci (!(KSTK_STATUS(prev) & ST0_CU1))) { \ 5962306a36Sopenharmony_ci clear_ti_thread_flag(__prev_ti, TIF_FPUBOUND); \ 6062306a36Sopenharmony_ci prev->cpus_mask = prev->thread.user_cpus_allowed; \ 6162306a36Sopenharmony_ci } \ 6262306a36Sopenharmony_ci next->thread.emulated_fp = 0; \ 6362306a36Sopenharmony_ci} while(0) 6462306a36Sopenharmony_ci 6562306a36Sopenharmony_ci#else 6662306a36Sopenharmony_ci#define __mips_mt_fpaff_switch_to(prev) do { (void) (prev); } while (0) 6762306a36Sopenharmony_ci#endif 6862306a36Sopenharmony_ci 6962306a36Sopenharmony_ci/* 7062306a36Sopenharmony_ci * Clear LLBit during context switches on MIPSr5+ such that eretnc can be used 7162306a36Sopenharmony_ci * unconditionally when returning to userland in entry.S. 7262306a36Sopenharmony_ci */ 7362306a36Sopenharmony_ci#define __clear_r5_hw_ll_bit() do { \ 7462306a36Sopenharmony_ci if (cpu_has_mips_r5 || cpu_has_mips_r6) \ 7562306a36Sopenharmony_ci write_c0_lladdr(0); \ 7662306a36Sopenharmony_ci} while (0) 7762306a36Sopenharmony_ci 7862306a36Sopenharmony_ci#define __clear_software_ll_bit() do { \ 7962306a36Sopenharmony_ci if (!__builtin_constant_p(cpu_has_llsc) || !cpu_has_llsc) \ 8062306a36Sopenharmony_ci ll_bit = 0; \ 8162306a36Sopenharmony_ci} while (0) 8262306a36Sopenharmony_ci 8362306a36Sopenharmony_ci/* 8462306a36Sopenharmony_ci * Check FCSR for any unmasked exceptions pending set with `ptrace', 8562306a36Sopenharmony_ci * clear them and send a signal. 8662306a36Sopenharmony_ci */ 8762306a36Sopenharmony_ci#ifdef CONFIG_MIPS_FP_SUPPORT 8862306a36Sopenharmony_ci# define __sanitize_fcr31(next) \ 8962306a36Sopenharmony_cido { \ 9062306a36Sopenharmony_ci unsigned long fcr31 = mask_fcr31_x(next->thread.fpu.fcr31); \ 9162306a36Sopenharmony_ci void __user *pc; \ 9262306a36Sopenharmony_ci \ 9362306a36Sopenharmony_ci if (unlikely(fcr31)) { \ 9462306a36Sopenharmony_ci pc = (void __user *)task_pt_regs(next)->cp0_epc; \ 9562306a36Sopenharmony_ci next->thread.fpu.fcr31 &= ~fcr31; \ 9662306a36Sopenharmony_ci force_fcr31_sig(fcr31, pc, next); \ 9762306a36Sopenharmony_ci } \ 9862306a36Sopenharmony_ci} while (0) 9962306a36Sopenharmony_ci#else 10062306a36Sopenharmony_ci# define __sanitize_fcr31(next) 10162306a36Sopenharmony_ci#endif 10262306a36Sopenharmony_ci 10362306a36Sopenharmony_ci/* 10462306a36Sopenharmony_ci * For newly created kernel threads switch_to() will return to 10562306a36Sopenharmony_ci * ret_from_kernel_thread, newly created user threads to ret_from_fork. 10662306a36Sopenharmony_ci * That is, everything following resume() will be skipped for new threads. 10762306a36Sopenharmony_ci * So everything that matters to new threads should be placed before resume(). 10862306a36Sopenharmony_ci */ 10962306a36Sopenharmony_ci#define switch_to(prev, next, last) \ 11062306a36Sopenharmony_cido { \ 11162306a36Sopenharmony_ci __mips_mt_fpaff_switch_to(prev); \ 11262306a36Sopenharmony_ci lose_fpu_inatomic(1, prev); \ 11362306a36Sopenharmony_ci if (tsk_used_math(next)) \ 11462306a36Sopenharmony_ci __sanitize_fcr31(next); \ 11562306a36Sopenharmony_ci if (cpu_has_dsp) { \ 11662306a36Sopenharmony_ci __save_dsp(prev); \ 11762306a36Sopenharmony_ci __restore_dsp(next); \ 11862306a36Sopenharmony_ci } \ 11962306a36Sopenharmony_ci if (cop2_present) { \ 12062306a36Sopenharmony_ci u32 status = read_c0_status(); \ 12162306a36Sopenharmony_ci \ 12262306a36Sopenharmony_ci set_c0_status(ST0_CU2); \ 12362306a36Sopenharmony_ci if ((KSTK_STATUS(prev) & ST0_CU2)) { \ 12462306a36Sopenharmony_ci if (cop2_lazy_restore) \ 12562306a36Sopenharmony_ci KSTK_STATUS(prev) &= ~ST0_CU2; \ 12662306a36Sopenharmony_ci cop2_save(prev); \ 12762306a36Sopenharmony_ci } \ 12862306a36Sopenharmony_ci if (KSTK_STATUS(next) & ST0_CU2 && \ 12962306a36Sopenharmony_ci !cop2_lazy_restore) { \ 13062306a36Sopenharmony_ci cop2_restore(next); \ 13162306a36Sopenharmony_ci } \ 13262306a36Sopenharmony_ci write_c0_status(status); \ 13362306a36Sopenharmony_ci } \ 13462306a36Sopenharmony_ci __clear_r5_hw_ll_bit(); \ 13562306a36Sopenharmony_ci __clear_software_ll_bit(); \ 13662306a36Sopenharmony_ci if (cpu_has_userlocal) \ 13762306a36Sopenharmony_ci write_c0_userlocal(task_thread_info(next)->tp_value); \ 13862306a36Sopenharmony_ci __restore_watch(next); \ 13962306a36Sopenharmony_ci (last) = resume(prev, next, task_thread_info(next)); \ 14062306a36Sopenharmony_ci} while (0) 14162306a36Sopenharmony_ci 14262306a36Sopenharmony_ci#endif /* _ASM_SWITCH_TO_H */ 143