162306a36Sopenharmony_ci/* 262306a36Sopenharmony_ci * This file is subject to the terms and conditions of the GNU General Public 362306a36Sopenharmony_ci * License. See the file "COPYING" in the main directory of this archive 462306a36Sopenharmony_ci * for more details. 562306a36Sopenharmony_ci */ 662306a36Sopenharmony_ci#ifndef _ASM_PCI_H 762306a36Sopenharmony_ci#define _ASM_PCI_H 862306a36Sopenharmony_ci 962306a36Sopenharmony_ci#include <linux/mm.h> 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_ci#ifdef __KERNEL__ 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ci/* 1462306a36Sopenharmony_ci * This file essentially defines the interface between board 1562306a36Sopenharmony_ci * specific PCI code and MIPS common PCI code. Should potentially put 1662306a36Sopenharmony_ci * into include/asm/pci.h file. 1762306a36Sopenharmony_ci */ 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ci#include <linux/ioport.h> 2062306a36Sopenharmony_ci#include <linux/list.h> 2162306a36Sopenharmony_ci#include <linux/of.h> 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_ci#ifdef CONFIG_PCI_DRIVERS_LEGACY 2462306a36Sopenharmony_ci 2562306a36Sopenharmony_ci/* 2662306a36Sopenharmony_ci * Each pci channel is a top-level PCI bus seem by CPU. A machine with 2762306a36Sopenharmony_ci * multiple PCI channels may have multiple PCI host controllers or a 2862306a36Sopenharmony_ci * single controller supporting multiple channels. 2962306a36Sopenharmony_ci */ 3062306a36Sopenharmony_cistruct pci_controller { 3162306a36Sopenharmony_ci struct list_head list; 3262306a36Sopenharmony_ci struct pci_bus *bus; 3362306a36Sopenharmony_ci struct device_node *of_node; 3462306a36Sopenharmony_ci 3562306a36Sopenharmony_ci struct pci_ops *pci_ops; 3662306a36Sopenharmony_ci struct resource *mem_resource; 3762306a36Sopenharmony_ci unsigned long mem_offset; 3862306a36Sopenharmony_ci struct resource *io_resource; 3962306a36Sopenharmony_ci unsigned long io_offset; 4062306a36Sopenharmony_ci unsigned long io_map_base; 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_ci#ifndef CONFIG_PCI_DOMAINS_GENERIC 4362306a36Sopenharmony_ci unsigned int index; 4462306a36Sopenharmony_ci /* For compatibility with current (as of July 2003) pciutils 4562306a36Sopenharmony_ci and XFree86. Eventually will be removed. */ 4662306a36Sopenharmony_ci unsigned int need_domain_info; 4762306a36Sopenharmony_ci#endif 4862306a36Sopenharmony_ci 4962306a36Sopenharmony_ci /* Optional access methods for reading/writing the bus number 5062306a36Sopenharmony_ci of the PCI controller */ 5162306a36Sopenharmony_ci int (*get_busno)(void); 5262306a36Sopenharmony_ci void (*set_busno)(int busno); 5362306a36Sopenharmony_ci}; 5462306a36Sopenharmony_ci 5562306a36Sopenharmony_ci/* 5662306a36Sopenharmony_ci * Used by boards to register their PCI busses before the actual scanning. 5762306a36Sopenharmony_ci */ 5862306a36Sopenharmony_ciextern void register_pci_controller(struct pci_controller *hose); 5962306a36Sopenharmony_ci 6062306a36Sopenharmony_ci/* 6162306a36Sopenharmony_ci * board supplied pci irq fixup routine 6262306a36Sopenharmony_ci */ 6362306a36Sopenharmony_ciextern int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin); 6462306a36Sopenharmony_ci 6562306a36Sopenharmony_ci/* Do platform specific device initialization at pci_enable_device() time */ 6662306a36Sopenharmony_ciextern int pcibios_plat_dev_init(struct pci_dev *dev); 6762306a36Sopenharmony_ci 6862306a36Sopenharmony_ciextern char * (*pcibios_plat_setup)(char *str); 6962306a36Sopenharmony_ci 7062306a36Sopenharmony_ci#ifdef CONFIG_OF 7162306a36Sopenharmony_ci/* this function parses memory ranges from a device node */ 7262306a36Sopenharmony_ciextern void pci_load_of_ranges(struct pci_controller *hose, 7362306a36Sopenharmony_ci struct device_node *node); 7462306a36Sopenharmony_ci#else 7562306a36Sopenharmony_cistatic inline void pci_load_of_ranges(struct pci_controller *hose, 7662306a36Sopenharmony_ci struct device_node *node) {} 7762306a36Sopenharmony_ci#endif 7862306a36Sopenharmony_ci 7962306a36Sopenharmony_ci#ifdef CONFIG_PCI_DOMAINS_GENERIC 8062306a36Sopenharmony_cistatic inline void set_pci_need_domain_info(struct pci_controller *hose, 8162306a36Sopenharmony_ci int need_domain_info) 8262306a36Sopenharmony_ci{ 8362306a36Sopenharmony_ci /* nothing to do */ 8462306a36Sopenharmony_ci} 8562306a36Sopenharmony_ci#elif defined(CONFIG_PCI_DOMAINS) 8662306a36Sopenharmony_cistatic inline void set_pci_need_domain_info(struct pci_controller *hose, 8762306a36Sopenharmony_ci int need_domain_info) 8862306a36Sopenharmony_ci{ 8962306a36Sopenharmony_ci hose->need_domain_info = need_domain_info; 9062306a36Sopenharmony_ci} 9162306a36Sopenharmony_ci#endif /* CONFIG_PCI_DOMAINS */ 9262306a36Sopenharmony_ci 9362306a36Sopenharmony_ci#endif 9462306a36Sopenharmony_ci 9562306a36Sopenharmony_ci/* Can be used to override the logic in pci_scan_bus for skipping 9662306a36Sopenharmony_ci already-configured bus numbers - to be used for buggy BIOSes 9762306a36Sopenharmony_ci or architectures with incomplete PCI setup by the loader */ 9862306a36Sopenharmony_cistatic inline unsigned int pcibios_assign_all_busses(void) 9962306a36Sopenharmony_ci{ 10062306a36Sopenharmony_ci return 1; 10162306a36Sopenharmony_ci} 10262306a36Sopenharmony_ci 10362306a36Sopenharmony_ciextern unsigned long PCIBIOS_MIN_IO; 10462306a36Sopenharmony_ciextern unsigned long PCIBIOS_MIN_MEM; 10562306a36Sopenharmony_ci 10662306a36Sopenharmony_ci#define PCIBIOS_MIN_CARDBUS_IO 0x4000 10762306a36Sopenharmony_ci 10862306a36Sopenharmony_ci#define HAVE_PCI_MMAP 10962306a36Sopenharmony_ci#define ARCH_GENERIC_PCI_MMAP_RESOURCE 11062306a36Sopenharmony_ci 11162306a36Sopenharmony_ci/* 11262306a36Sopenharmony_ci * Dynamic DMA mapping stuff. 11362306a36Sopenharmony_ci * MIPS has everything mapped statically. 11462306a36Sopenharmony_ci */ 11562306a36Sopenharmony_ci 11662306a36Sopenharmony_ci#include <linux/types.h> 11762306a36Sopenharmony_ci#include <linux/slab.h> 11862306a36Sopenharmony_ci#include <linux/scatterlist.h> 11962306a36Sopenharmony_ci#include <linux/string.h> 12062306a36Sopenharmony_ci#include <asm/io.h> 12162306a36Sopenharmony_ci 12262306a36Sopenharmony_ci#ifdef CONFIG_PCI_DOMAINS_GENERIC 12362306a36Sopenharmony_cistatic inline int pci_proc_domain(struct pci_bus *bus) 12462306a36Sopenharmony_ci{ 12562306a36Sopenharmony_ci return pci_domain_nr(bus); 12662306a36Sopenharmony_ci} 12762306a36Sopenharmony_ci#elif defined(CONFIG_PCI_DOMAINS) 12862306a36Sopenharmony_ci#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index 12962306a36Sopenharmony_ci 13062306a36Sopenharmony_cistatic inline int pci_proc_domain(struct pci_bus *bus) 13162306a36Sopenharmony_ci{ 13262306a36Sopenharmony_ci struct pci_controller *hose = bus->sysdata; 13362306a36Sopenharmony_ci return hose->need_domain_info; 13462306a36Sopenharmony_ci} 13562306a36Sopenharmony_ci#endif /* CONFIG_PCI_DOMAINS */ 13662306a36Sopenharmony_ci 13762306a36Sopenharmony_ci#endif /* __KERNEL__ */ 13862306a36Sopenharmony_ci 13962306a36Sopenharmony_ci/* Do platform specific device initialization at pci_enable_device() time */ 14062306a36Sopenharmony_ciextern int pcibios_plat_dev_init(struct pci_dev *dev); 14162306a36Sopenharmony_ci 14262306a36Sopenharmony_ci#endif /* _ASM_PCI_H */ 143