162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-or-later */ 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * include/asm-mips/irq_cpu.h 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * MIPS CPU interrupt definitions. 662306a36Sopenharmony_ci * 762306a36Sopenharmony_ci * Copyright (C) 2002 Maciej W. Rozycki 862306a36Sopenharmony_ci */ 962306a36Sopenharmony_ci#ifndef _ASM_IRQ_CPU_H 1062306a36Sopenharmony_ci#define _ASM_IRQ_CPU_H 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ciextern void mips_cpu_irq_init(void); 1362306a36Sopenharmony_ci 1462306a36Sopenharmony_ci#ifdef CONFIG_IRQ_DOMAIN 1562306a36Sopenharmony_cistruct device_node; 1662306a36Sopenharmony_ciextern int mips_cpu_irq_of_init(struct device_node *of_node, 1762306a36Sopenharmony_ci struct device_node *parent); 1862306a36Sopenharmony_ci#endif 1962306a36Sopenharmony_ci 2062306a36Sopenharmony_ci#endif /* _ASM_IRQ_CPU_H */ 21