162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci *  Copyright (C) 1991, 1992, 1995  Linus Torvalds
462306a36Sopenharmony_ci *  Copyright (C) 2000, 2003  Maciej W. Rozycki
562306a36Sopenharmony_ci *
662306a36Sopenharmony_ci * This file contains the time handling details for PC-style clocks as
762306a36Sopenharmony_ci * found in some MIPS systems.
862306a36Sopenharmony_ci *
962306a36Sopenharmony_ci */
1062306a36Sopenharmony_ci#include <linux/bcd.h>
1162306a36Sopenharmony_ci#include <linux/init.h>
1262306a36Sopenharmony_ci#include <linux/mc146818rtc.h>
1362306a36Sopenharmony_ci#include <linux/param.h>
1462306a36Sopenharmony_ci
1562306a36Sopenharmony_ci#include <asm/cpu-features.h>
1662306a36Sopenharmony_ci#include <asm/ds1287.h>
1762306a36Sopenharmony_ci#include <asm/time.h>
1862306a36Sopenharmony_ci#include <asm/dec/interrupts.h>
1962306a36Sopenharmony_ci#include <asm/dec/ioasic.h>
2062306a36Sopenharmony_ci#include <asm/dec/machtype.h>
2162306a36Sopenharmony_ci
2262306a36Sopenharmony_civoid read_persistent_clock64(struct timespec64 *ts)
2362306a36Sopenharmony_ci{
2462306a36Sopenharmony_ci	unsigned int year, mon, day, hour, min, sec, real_year;
2562306a36Sopenharmony_ci	unsigned long flags;
2662306a36Sopenharmony_ci
2762306a36Sopenharmony_ci	spin_lock_irqsave(&rtc_lock, flags);
2862306a36Sopenharmony_ci
2962306a36Sopenharmony_ci	do {
3062306a36Sopenharmony_ci		sec = CMOS_READ(RTC_SECONDS);
3162306a36Sopenharmony_ci		min = CMOS_READ(RTC_MINUTES);
3262306a36Sopenharmony_ci		hour = CMOS_READ(RTC_HOURS);
3362306a36Sopenharmony_ci		day = CMOS_READ(RTC_DAY_OF_MONTH);
3462306a36Sopenharmony_ci		mon = CMOS_READ(RTC_MONTH);
3562306a36Sopenharmony_ci		year = CMOS_READ(RTC_YEAR);
3662306a36Sopenharmony_ci		/*
3762306a36Sopenharmony_ci		 * The PROM will reset the year to either '72 or '73.
3862306a36Sopenharmony_ci		 * Therefore we store the real year separately, in one
3962306a36Sopenharmony_ci		 * of unused BBU RAM locations.
4062306a36Sopenharmony_ci		 */
4162306a36Sopenharmony_ci		real_year = CMOS_READ(RTC_DEC_YEAR);
4262306a36Sopenharmony_ci	} while (sec != CMOS_READ(RTC_SECONDS));
4362306a36Sopenharmony_ci
4462306a36Sopenharmony_ci	spin_unlock_irqrestore(&rtc_lock, flags);
4562306a36Sopenharmony_ci
4662306a36Sopenharmony_ci	if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
4762306a36Sopenharmony_ci		sec = bcd2bin(sec);
4862306a36Sopenharmony_ci		min = bcd2bin(min);
4962306a36Sopenharmony_ci		hour = bcd2bin(hour);
5062306a36Sopenharmony_ci		day = bcd2bin(day);
5162306a36Sopenharmony_ci		mon = bcd2bin(mon);
5262306a36Sopenharmony_ci		year = bcd2bin(year);
5362306a36Sopenharmony_ci	}
5462306a36Sopenharmony_ci
5562306a36Sopenharmony_ci	year += real_year - 72 + 2000;
5662306a36Sopenharmony_ci
5762306a36Sopenharmony_ci	ts->tv_sec = mktime64(year, mon, day, hour, min, sec);
5862306a36Sopenharmony_ci	ts->tv_nsec = 0;
5962306a36Sopenharmony_ci}
6062306a36Sopenharmony_ci
6162306a36Sopenharmony_ci/*
6262306a36Sopenharmony_ci * In order to set the CMOS clock precisely, update_persistent_clock64 has to
6362306a36Sopenharmony_ci * be called 500 ms after the second nowtime has started, because when
6462306a36Sopenharmony_ci * nowtime is written into the registers of the CMOS clock, it will
6562306a36Sopenharmony_ci * jump to the next second precisely 500 ms later.  Check the Dallas
6662306a36Sopenharmony_ci * DS1287 data sheet for details.
6762306a36Sopenharmony_ci */
6862306a36Sopenharmony_ciint update_persistent_clock64(struct timespec64 now)
6962306a36Sopenharmony_ci{
7062306a36Sopenharmony_ci	time64_t nowtime = now.tv_sec;
7162306a36Sopenharmony_ci	int retval = 0;
7262306a36Sopenharmony_ci	int real_seconds, real_minutes, cmos_minutes;
7362306a36Sopenharmony_ci	unsigned char save_control, save_freq_select;
7462306a36Sopenharmony_ci
7562306a36Sopenharmony_ci	/* irq are locally disabled here */
7662306a36Sopenharmony_ci	spin_lock(&rtc_lock);
7762306a36Sopenharmony_ci	/* tell the clock it's being set */
7862306a36Sopenharmony_ci	save_control = CMOS_READ(RTC_CONTROL);
7962306a36Sopenharmony_ci	CMOS_WRITE((save_control | RTC_SET), RTC_CONTROL);
8062306a36Sopenharmony_ci
8162306a36Sopenharmony_ci	/* stop and reset prescaler */
8262306a36Sopenharmony_ci	save_freq_select = CMOS_READ(RTC_FREQ_SELECT);
8362306a36Sopenharmony_ci	CMOS_WRITE((save_freq_select | RTC_DIV_RESET2), RTC_FREQ_SELECT);
8462306a36Sopenharmony_ci
8562306a36Sopenharmony_ci	cmos_minutes = CMOS_READ(RTC_MINUTES);
8662306a36Sopenharmony_ci	if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
8762306a36Sopenharmony_ci		cmos_minutes = bcd2bin(cmos_minutes);
8862306a36Sopenharmony_ci
8962306a36Sopenharmony_ci	/*
9062306a36Sopenharmony_ci	 * since we're only adjusting minutes and seconds,
9162306a36Sopenharmony_ci	 * don't interfere with hour overflow. This avoids
9262306a36Sopenharmony_ci	 * messing with unknown time zones but requires your
9362306a36Sopenharmony_ci	 * RTC not to be off by more than 15 minutes
9462306a36Sopenharmony_ci	 */
9562306a36Sopenharmony_ci	real_minutes = div_s64_rem(nowtime, 60, &real_seconds);
9662306a36Sopenharmony_ci	if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1)
9762306a36Sopenharmony_ci		real_minutes += 30;	/* correct for half hour time zone */
9862306a36Sopenharmony_ci	real_minutes %= 60;
9962306a36Sopenharmony_ci
10062306a36Sopenharmony_ci	if (abs(real_minutes - cmos_minutes) < 30) {
10162306a36Sopenharmony_ci		if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
10262306a36Sopenharmony_ci			real_seconds = bin2bcd(real_seconds);
10362306a36Sopenharmony_ci			real_minutes = bin2bcd(real_minutes);
10462306a36Sopenharmony_ci		}
10562306a36Sopenharmony_ci		CMOS_WRITE(real_seconds, RTC_SECONDS);
10662306a36Sopenharmony_ci		CMOS_WRITE(real_minutes, RTC_MINUTES);
10762306a36Sopenharmony_ci	} else {
10862306a36Sopenharmony_ci		printk_once(KERN_NOTICE
10962306a36Sopenharmony_ci		       "set_rtc_mmss: can't update from %d to %d\n",
11062306a36Sopenharmony_ci		       cmos_minutes, real_minutes);
11162306a36Sopenharmony_ci		retval = -1;
11262306a36Sopenharmony_ci	}
11362306a36Sopenharmony_ci
11462306a36Sopenharmony_ci	/* The following flags have to be released exactly in this order,
11562306a36Sopenharmony_ci	 * otherwise the DS1287 will not reset the oscillator and will not
11662306a36Sopenharmony_ci	 * update precisely 500 ms later.  You won't find this mentioned
11762306a36Sopenharmony_ci	 * in the Dallas Semiconductor data sheets, but who believes data
11862306a36Sopenharmony_ci	 * sheets anyway ...                           -- Markus Kuhn
11962306a36Sopenharmony_ci	 */
12062306a36Sopenharmony_ci	CMOS_WRITE(save_control, RTC_CONTROL);
12162306a36Sopenharmony_ci	CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
12262306a36Sopenharmony_ci	spin_unlock(&rtc_lock);
12362306a36Sopenharmony_ci
12462306a36Sopenharmony_ci	return retval;
12562306a36Sopenharmony_ci}
12662306a36Sopenharmony_ci
12762306a36Sopenharmony_civoid __init plat_time_init(void)
12862306a36Sopenharmony_ci{
12962306a36Sopenharmony_ci	int ioasic_clock = 0;
13062306a36Sopenharmony_ci	u32 start, end;
13162306a36Sopenharmony_ci	int i = HZ / 8;
13262306a36Sopenharmony_ci
13362306a36Sopenharmony_ci	/* Set up the rate of periodic DS1287 interrupts. */
13462306a36Sopenharmony_ci	ds1287_set_base_clock(HZ);
13562306a36Sopenharmony_ci
13662306a36Sopenharmony_ci	/* On some I/O ASIC systems we have the I/O ASIC's counter.  */
13762306a36Sopenharmony_ci	if (IOASIC)
13862306a36Sopenharmony_ci		ioasic_clock = dec_ioasic_clocksource_init() == 0;
13962306a36Sopenharmony_ci	if (cpu_has_counter) {
14062306a36Sopenharmony_ci		ds1287_timer_state();
14162306a36Sopenharmony_ci		while (!ds1287_timer_state())
14262306a36Sopenharmony_ci			;
14362306a36Sopenharmony_ci
14462306a36Sopenharmony_ci		start = read_c0_count();
14562306a36Sopenharmony_ci
14662306a36Sopenharmony_ci		while (i--)
14762306a36Sopenharmony_ci			while (!ds1287_timer_state())
14862306a36Sopenharmony_ci				;
14962306a36Sopenharmony_ci
15062306a36Sopenharmony_ci		end = read_c0_count();
15162306a36Sopenharmony_ci
15262306a36Sopenharmony_ci		mips_hpt_frequency = (end - start) * 8;
15362306a36Sopenharmony_ci		printk(KERN_INFO "MIPS counter frequency %dHz\n",
15462306a36Sopenharmony_ci			mips_hpt_frequency);
15562306a36Sopenharmony_ci
15662306a36Sopenharmony_ci		/*
15762306a36Sopenharmony_ci		 * All R4k DECstations suffer from the CP0 Count erratum,
15862306a36Sopenharmony_ci		 * so we can't use the timer as a clock source, and a clock
15962306a36Sopenharmony_ci		 * event both at a time.  An accurate wall clock is more
16062306a36Sopenharmony_ci		 * important than a high-precision interval timer so only
16162306a36Sopenharmony_ci		 * use the timer as a clock source, and not a clock event
16262306a36Sopenharmony_ci		 * if there's no I/O ASIC counter available to serve as a
16362306a36Sopenharmony_ci		 * clock source.
16462306a36Sopenharmony_ci		 */
16562306a36Sopenharmony_ci		if (!ioasic_clock) {
16662306a36Sopenharmony_ci			init_r4k_clocksource();
16762306a36Sopenharmony_ci			mips_hpt_frequency = 0;
16862306a36Sopenharmony_ci		}
16962306a36Sopenharmony_ci	}
17062306a36Sopenharmony_ci
17162306a36Sopenharmony_ci	ds1287_clockevent_init(dec_interrupt[DEC_IRQ_RTC]);
17262306a36Sopenharmony_ci}
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