162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0
262306a36Sopenharmony_ci/dts-v1/;
362306a36Sopenharmony_ci
462306a36Sopenharmony_ci#include <dt-bindings/interrupt-controller/irq.h>
562306a36Sopenharmony_ci#include <dt-bindings/interrupt-controller/mips-gic.h>
662306a36Sopenharmony_ci
762306a36Sopenharmony_ci/memreserve/ 0x00000000 0x00001000;	/* YAMON exception vectors */
862306a36Sopenharmony_ci/memreserve/ 0x00001000 0x000ef000;	/* YAMON */
962306a36Sopenharmony_ci/memreserve/ 0x000f0000 0x00010000;	/* PIIX4 ISA memory */
1062306a36Sopenharmony_ci
1162306a36Sopenharmony_ci/ {
1262306a36Sopenharmony_ci	#address-cells = <1>;
1362306a36Sopenharmony_ci	#size-cells = <1>;
1462306a36Sopenharmony_ci	compatible = "mti,malta";
1562306a36Sopenharmony_ci
1662306a36Sopenharmony_ci	cpu_intc: interrupt-controller {
1762306a36Sopenharmony_ci		compatible = "mti,cpu-interrupt-controller";
1862306a36Sopenharmony_ci
1962306a36Sopenharmony_ci		interrupt-controller;
2062306a36Sopenharmony_ci		#interrupt-cells = <1>;
2162306a36Sopenharmony_ci	};
2262306a36Sopenharmony_ci
2362306a36Sopenharmony_ci	gic: interrupt-controller@1bdc0000 {
2462306a36Sopenharmony_ci		compatible = "mti,gic";
2562306a36Sopenharmony_ci		reg = <0x1bdc0000 0x20000>;
2662306a36Sopenharmony_ci
2762306a36Sopenharmony_ci		interrupt-controller;
2862306a36Sopenharmony_ci		#interrupt-cells = <3>;
2962306a36Sopenharmony_ci
3062306a36Sopenharmony_ci		/*
3162306a36Sopenharmony_ci		 * Declare the interrupt-parent even though the mti,gic
3262306a36Sopenharmony_ci		 * binding doesn't require it, such that the kernel can
3362306a36Sopenharmony_ci		 * figure out that cpu_intc is the root interrupt
3462306a36Sopenharmony_ci		 * controller & should be probed first.
3562306a36Sopenharmony_ci		 */
3662306a36Sopenharmony_ci		interrupt-parent = <&cpu_intc>;
3762306a36Sopenharmony_ci
3862306a36Sopenharmony_ci		timer {
3962306a36Sopenharmony_ci			compatible = "mti,gic-timer";
4062306a36Sopenharmony_ci			interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
4162306a36Sopenharmony_ci		};
4262306a36Sopenharmony_ci	};
4362306a36Sopenharmony_ci
4462306a36Sopenharmony_ci	i8259: interrupt-controller@20 {
4562306a36Sopenharmony_ci		compatible = "intel,i8259";
4662306a36Sopenharmony_ci
4762306a36Sopenharmony_ci		interrupt-controller;
4862306a36Sopenharmony_ci		#interrupt-cells = <1>;
4962306a36Sopenharmony_ci
5062306a36Sopenharmony_ci		interrupt-parent = <&gic>;
5162306a36Sopenharmony_ci		interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>;
5262306a36Sopenharmony_ci	};
5362306a36Sopenharmony_ci
5462306a36Sopenharmony_ci	flash@1e000000 {
5562306a36Sopenharmony_ci		compatible = "intel,dt28f160", "cfi-flash";
5662306a36Sopenharmony_ci		reg = <0x1e000000 0x400000>;
5762306a36Sopenharmony_ci		bank-width = <4>;
5862306a36Sopenharmony_ci		#address-cells = <1>;
5962306a36Sopenharmony_ci		#size-cells = <1>;
6062306a36Sopenharmony_ci
6162306a36Sopenharmony_ci		partitions {
6262306a36Sopenharmony_ci			compatible = "fixed-partitions";
6362306a36Sopenharmony_ci			#address-cells = <1>;
6462306a36Sopenharmony_ci			#size-cells = <1>;
6562306a36Sopenharmony_ci
6662306a36Sopenharmony_ci			yamon@0 {
6762306a36Sopenharmony_ci				label = "YAMON";
6862306a36Sopenharmony_ci				reg = <0x0 0x100000>;
6962306a36Sopenharmony_ci				read-only;
7062306a36Sopenharmony_ci			};
7162306a36Sopenharmony_ci
7262306a36Sopenharmony_ci			user-fs@100000 {
7362306a36Sopenharmony_ci				label = "User FS";
7462306a36Sopenharmony_ci				reg = <0x100000 0x2e0000>;
7562306a36Sopenharmony_ci			};
7662306a36Sopenharmony_ci
7762306a36Sopenharmony_ci			board-config@3e0000 {
7862306a36Sopenharmony_ci				label = "Board Config";
7962306a36Sopenharmony_ci				reg = <0x3e0000 0x20000>;
8062306a36Sopenharmony_ci				read-only;
8162306a36Sopenharmony_ci			};
8262306a36Sopenharmony_ci		};
8362306a36Sopenharmony_ci	};
8462306a36Sopenharmony_ci
8562306a36Sopenharmony_ci	fpga_regs: system-controller@1f000000 {
8662306a36Sopenharmony_ci		compatible = "mti,malta-fpga", "syscon", "simple-mfd";
8762306a36Sopenharmony_ci		reg = <0x1f000000 0x1000>;
8862306a36Sopenharmony_ci		native-endian;
8962306a36Sopenharmony_ci
9062306a36Sopenharmony_ci		lcd@410 {
9162306a36Sopenharmony_ci			compatible = "mti,malta-lcd";
9262306a36Sopenharmony_ci			offset = <0x410>;
9362306a36Sopenharmony_ci		};
9462306a36Sopenharmony_ci
9562306a36Sopenharmony_ci		reboot {
9662306a36Sopenharmony_ci			compatible = "syscon-reboot";
9762306a36Sopenharmony_ci			regmap = <&fpga_regs>;
9862306a36Sopenharmony_ci			offset = <0x500>;
9962306a36Sopenharmony_ci			mask = <0x42>;
10062306a36Sopenharmony_ci		};
10162306a36Sopenharmony_ci	};
10262306a36Sopenharmony_ci
10362306a36Sopenharmony_ci	isa {
10462306a36Sopenharmony_ci		compatible = "isa";
10562306a36Sopenharmony_ci		#address-cells = <2>;
10662306a36Sopenharmony_ci		#size-cells = <1>;
10762306a36Sopenharmony_ci		ranges = <1 0 0 0x1000>;
10862306a36Sopenharmony_ci
10962306a36Sopenharmony_ci		rtc@70 {
11062306a36Sopenharmony_ci			compatible = "motorola,mc146818";
11162306a36Sopenharmony_ci			reg = <1 0x70 0x8>;
11262306a36Sopenharmony_ci
11362306a36Sopenharmony_ci			interrupt-parent = <&i8259>;
11462306a36Sopenharmony_ci			interrupts = <8>;
11562306a36Sopenharmony_ci		};
11662306a36Sopenharmony_ci	};
11762306a36Sopenharmony_ci};
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