162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Au1300 media block power gating (VSS) 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * This is a stop-gap solution until I have the clock framework integration 662306a36Sopenharmony_ci * ready. This stuff here really must be handled transparently when clocks 762306a36Sopenharmony_ci * for various media blocks are enabled/disabled. 862306a36Sopenharmony_ci */ 962306a36Sopenharmony_ci 1062306a36Sopenharmony_ci#include <linux/export.h> 1162306a36Sopenharmony_ci#include <linux/spinlock.h> 1262306a36Sopenharmony_ci#include <asm/mach-au1x00/au1000.h> 1362306a36Sopenharmony_ci 1462306a36Sopenharmony_ci#define VSS_GATE 0x00 /* gate wait timers */ 1562306a36Sopenharmony_ci#define VSS_CLKRST 0x04 /* clock/block control */ 1662306a36Sopenharmony_ci#define VSS_FTR 0x08 /* footers */ 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ci#define VSS_ADDR(blk) (KSEG1ADDR(AU1300_VSS_PHYS_ADDR) + (blk * 0x0c)) 1962306a36Sopenharmony_ci 2062306a36Sopenharmony_cistatic DEFINE_SPINLOCK(au1300_vss_lock); 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ci/* enable a block as outlined in the databook */ 2362306a36Sopenharmony_cistatic inline void __enable_block(int block) 2462306a36Sopenharmony_ci{ 2562306a36Sopenharmony_ci void __iomem *base = (void __iomem *)VSS_ADDR(block); 2662306a36Sopenharmony_ci 2762306a36Sopenharmony_ci __raw_writel(3, base + VSS_CLKRST); /* enable clock, assert reset */ 2862306a36Sopenharmony_ci wmb(); 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ci __raw_writel(0x01fffffe, base + VSS_GATE); /* maximum setup time */ 3162306a36Sopenharmony_ci wmb(); 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_ci /* enable footers in sequence */ 3462306a36Sopenharmony_ci __raw_writel(0x01, base + VSS_FTR); 3562306a36Sopenharmony_ci wmb(); 3662306a36Sopenharmony_ci __raw_writel(0x03, base + VSS_FTR); 3762306a36Sopenharmony_ci wmb(); 3862306a36Sopenharmony_ci __raw_writel(0x07, base + VSS_FTR); 3962306a36Sopenharmony_ci wmb(); 4062306a36Sopenharmony_ci __raw_writel(0x0f, base + VSS_FTR); 4162306a36Sopenharmony_ci wmb(); 4262306a36Sopenharmony_ci 4362306a36Sopenharmony_ci __raw_writel(0x01ffffff, base + VSS_GATE); /* start FSM too */ 4462306a36Sopenharmony_ci wmb(); 4562306a36Sopenharmony_ci 4662306a36Sopenharmony_ci __raw_writel(2, base + VSS_CLKRST); /* deassert reset */ 4762306a36Sopenharmony_ci wmb(); 4862306a36Sopenharmony_ci 4962306a36Sopenharmony_ci __raw_writel(0x1f, base + VSS_FTR); /* enable isolation cells */ 5062306a36Sopenharmony_ci wmb(); 5162306a36Sopenharmony_ci} 5262306a36Sopenharmony_ci 5362306a36Sopenharmony_ci/* disable a block as outlined in the databook */ 5462306a36Sopenharmony_cistatic inline void __disable_block(int block) 5562306a36Sopenharmony_ci{ 5662306a36Sopenharmony_ci void __iomem *base = (void __iomem *)VSS_ADDR(block); 5762306a36Sopenharmony_ci 5862306a36Sopenharmony_ci __raw_writel(0x0f, base + VSS_FTR); /* disable isolation cells */ 5962306a36Sopenharmony_ci wmb(); 6062306a36Sopenharmony_ci __raw_writel(0, base + VSS_GATE); /* disable FSM */ 6162306a36Sopenharmony_ci wmb(); 6262306a36Sopenharmony_ci __raw_writel(3, base + VSS_CLKRST); /* assert reset */ 6362306a36Sopenharmony_ci wmb(); 6462306a36Sopenharmony_ci __raw_writel(1, base + VSS_CLKRST); /* disable clock */ 6562306a36Sopenharmony_ci wmb(); 6662306a36Sopenharmony_ci __raw_writel(0, base + VSS_FTR); /* disable all footers */ 6762306a36Sopenharmony_ci wmb(); 6862306a36Sopenharmony_ci} 6962306a36Sopenharmony_ci 7062306a36Sopenharmony_civoid au1300_vss_block_control(int block, int enable) 7162306a36Sopenharmony_ci{ 7262306a36Sopenharmony_ci unsigned long flags; 7362306a36Sopenharmony_ci 7462306a36Sopenharmony_ci if (alchemy_get_cputype() != ALCHEMY_CPU_AU1300) 7562306a36Sopenharmony_ci return; 7662306a36Sopenharmony_ci 7762306a36Sopenharmony_ci /* only one block at a time */ 7862306a36Sopenharmony_ci spin_lock_irqsave(&au1300_vss_lock, flags); 7962306a36Sopenharmony_ci if (enable) 8062306a36Sopenharmony_ci __enable_block(block); 8162306a36Sopenharmony_ci else 8262306a36Sopenharmony_ci __disable_block(block); 8362306a36Sopenharmony_ci spin_unlock_irqrestore(&au1300_vss_lock, flags); 8462306a36Sopenharmony_ci} 8562306a36Sopenharmony_ciEXPORT_SYMBOL_GPL(au1300_vss_block_control); 86