162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * GPR board platform device registration (Au1550) 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Copyright (C) 2010 Wolfgang Grandegger <wg@denx.de> 662306a36Sopenharmony_ci */ 762306a36Sopenharmony_ci 862306a36Sopenharmony_ci#include <linux/delay.h> 962306a36Sopenharmony_ci#include <linux/init.h> 1062306a36Sopenharmony_ci#include <linux/interrupt.h> 1162306a36Sopenharmony_ci#include <linux/kernel.h> 1262306a36Sopenharmony_ci#include <linux/platform_device.h> 1362306a36Sopenharmony_ci#include <linux/pm.h> 1462306a36Sopenharmony_ci#include <linux/mtd/partitions.h> 1562306a36Sopenharmony_ci#include <linux/mtd/physmap.h> 1662306a36Sopenharmony_ci#include <linux/leds.h> 1762306a36Sopenharmony_ci#include <linux/gpio.h> 1862306a36Sopenharmony_ci#include <linux/i2c.h> 1962306a36Sopenharmony_ci#include <linux/platform_data/i2c-gpio.h> 2062306a36Sopenharmony_ci#include <linux/gpio/machine.h> 2162306a36Sopenharmony_ci#include <asm/bootinfo.h> 2262306a36Sopenharmony_ci#include <asm/idle.h> 2362306a36Sopenharmony_ci#include <asm/reboot.h> 2462306a36Sopenharmony_ci#include <asm/setup.h> 2562306a36Sopenharmony_ci#include <asm/mach-au1x00/au1000.h> 2662306a36Sopenharmony_ci#include <asm/mach-au1x00/gpio-au1000.h> 2762306a36Sopenharmony_ci#include <prom.h> 2862306a36Sopenharmony_ci 2962306a36Sopenharmony_ciconst char *get_system_type(void) 3062306a36Sopenharmony_ci{ 3162306a36Sopenharmony_ci return "GPR"; 3262306a36Sopenharmony_ci} 3362306a36Sopenharmony_ci 3462306a36Sopenharmony_civoid prom_putchar(char c) 3562306a36Sopenharmony_ci{ 3662306a36Sopenharmony_ci alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c); 3762306a36Sopenharmony_ci} 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_cistatic void gpr_reset(char *c) 4062306a36Sopenharmony_ci{ 4162306a36Sopenharmony_ci /* switch System-LED to orange (red# and green# on) */ 4262306a36Sopenharmony_ci alchemy_gpio_direction_output(4, 0); 4362306a36Sopenharmony_ci alchemy_gpio_direction_output(5, 0); 4462306a36Sopenharmony_ci 4562306a36Sopenharmony_ci /* trigger watchdog to reset board in 200ms */ 4662306a36Sopenharmony_ci printk(KERN_EMERG "Triggering watchdog soft reset...\n"); 4762306a36Sopenharmony_ci raw_local_irq_disable(); 4862306a36Sopenharmony_ci alchemy_gpio_direction_output(1, 0); 4962306a36Sopenharmony_ci udelay(1); 5062306a36Sopenharmony_ci alchemy_gpio_set_value(1, 1); 5162306a36Sopenharmony_ci while (1) 5262306a36Sopenharmony_ci cpu_wait(); 5362306a36Sopenharmony_ci} 5462306a36Sopenharmony_ci 5562306a36Sopenharmony_cistatic void gpr_power_off(void) 5662306a36Sopenharmony_ci{ 5762306a36Sopenharmony_ci while (1) 5862306a36Sopenharmony_ci cpu_wait(); 5962306a36Sopenharmony_ci} 6062306a36Sopenharmony_ci 6162306a36Sopenharmony_civoid __init board_setup(void) 6262306a36Sopenharmony_ci{ 6362306a36Sopenharmony_ci printk(KERN_INFO "Trapeze ITS GPR board\n"); 6462306a36Sopenharmony_ci 6562306a36Sopenharmony_ci pm_power_off = gpr_power_off; 6662306a36Sopenharmony_ci _machine_halt = gpr_power_off; 6762306a36Sopenharmony_ci _machine_restart = gpr_reset; 6862306a36Sopenharmony_ci 6962306a36Sopenharmony_ci /* Enable UART1/3 */ 7062306a36Sopenharmony_ci alchemy_uart_enable(AU1000_UART3_PHYS_ADDR); 7162306a36Sopenharmony_ci alchemy_uart_enable(AU1000_UART1_PHYS_ADDR); 7262306a36Sopenharmony_ci 7362306a36Sopenharmony_ci /* Take away Reset of UMTS-card */ 7462306a36Sopenharmony_ci alchemy_gpio_direction_output(215, 1); 7562306a36Sopenharmony_ci} 7662306a36Sopenharmony_ci 7762306a36Sopenharmony_ci/* 7862306a36Sopenharmony_ci * Watchdog 7962306a36Sopenharmony_ci */ 8062306a36Sopenharmony_cistatic struct resource gpr_wdt_resource[] = { 8162306a36Sopenharmony_ci [0] = { 8262306a36Sopenharmony_ci .start = 1, 8362306a36Sopenharmony_ci .end = 1, 8462306a36Sopenharmony_ci .name = "gpr-adm6320-wdt", 8562306a36Sopenharmony_ci .flags = IORESOURCE_IRQ, 8662306a36Sopenharmony_ci } 8762306a36Sopenharmony_ci}; 8862306a36Sopenharmony_ci 8962306a36Sopenharmony_cistatic struct platform_device gpr_wdt_device = { 9062306a36Sopenharmony_ci .name = "adm6320-wdt", 9162306a36Sopenharmony_ci .id = 0, 9262306a36Sopenharmony_ci .num_resources = ARRAY_SIZE(gpr_wdt_resource), 9362306a36Sopenharmony_ci .resource = gpr_wdt_resource, 9462306a36Sopenharmony_ci}; 9562306a36Sopenharmony_ci 9662306a36Sopenharmony_ci/* 9762306a36Sopenharmony_ci * FLASH 9862306a36Sopenharmony_ci * 9962306a36Sopenharmony_ci * 0x00000000-0x00200000 : "kernel" 10062306a36Sopenharmony_ci * 0x00200000-0x00a00000 : "rootfs" 10162306a36Sopenharmony_ci * 0x01d00000-0x01f00000 : "config" 10262306a36Sopenharmony_ci * 0x01c00000-0x01d00000 : "yamon" 10362306a36Sopenharmony_ci * 0x01d00000-0x01d40000 : "yamon env vars" 10462306a36Sopenharmony_ci * 0x00000000-0x00a00000 : "kernel+rootfs" 10562306a36Sopenharmony_ci */ 10662306a36Sopenharmony_cistatic struct mtd_partition gpr_mtd_partitions[] = { 10762306a36Sopenharmony_ci { 10862306a36Sopenharmony_ci .name = "kernel", 10962306a36Sopenharmony_ci .size = 0x00200000, 11062306a36Sopenharmony_ci .offset = 0, 11162306a36Sopenharmony_ci }, 11262306a36Sopenharmony_ci { 11362306a36Sopenharmony_ci .name = "rootfs", 11462306a36Sopenharmony_ci .size = 0x00800000, 11562306a36Sopenharmony_ci .offset = MTDPART_OFS_APPEND, 11662306a36Sopenharmony_ci .mask_flags = MTD_WRITEABLE, 11762306a36Sopenharmony_ci }, 11862306a36Sopenharmony_ci { 11962306a36Sopenharmony_ci .name = "config", 12062306a36Sopenharmony_ci .size = 0x00200000, 12162306a36Sopenharmony_ci .offset = 0x01d00000, 12262306a36Sopenharmony_ci }, 12362306a36Sopenharmony_ci { 12462306a36Sopenharmony_ci .name = "yamon", 12562306a36Sopenharmony_ci .size = 0x00100000, 12662306a36Sopenharmony_ci .offset = 0x01c00000, 12762306a36Sopenharmony_ci }, 12862306a36Sopenharmony_ci { 12962306a36Sopenharmony_ci .name = "yamon env vars", 13062306a36Sopenharmony_ci .size = 0x00040000, 13162306a36Sopenharmony_ci .offset = MTDPART_OFS_APPEND, 13262306a36Sopenharmony_ci }, 13362306a36Sopenharmony_ci { 13462306a36Sopenharmony_ci .name = "kernel+rootfs", 13562306a36Sopenharmony_ci .size = 0x00a00000, 13662306a36Sopenharmony_ci .offset = 0, 13762306a36Sopenharmony_ci }, 13862306a36Sopenharmony_ci}; 13962306a36Sopenharmony_ci 14062306a36Sopenharmony_cistatic struct physmap_flash_data gpr_flash_data = { 14162306a36Sopenharmony_ci .width = 4, 14262306a36Sopenharmony_ci .nr_parts = ARRAY_SIZE(gpr_mtd_partitions), 14362306a36Sopenharmony_ci .parts = gpr_mtd_partitions, 14462306a36Sopenharmony_ci}; 14562306a36Sopenharmony_ci 14662306a36Sopenharmony_cistatic struct resource gpr_mtd_resource = { 14762306a36Sopenharmony_ci .start = 0x1e000000, 14862306a36Sopenharmony_ci .end = 0x1fffffff, 14962306a36Sopenharmony_ci .flags = IORESOURCE_MEM, 15062306a36Sopenharmony_ci}; 15162306a36Sopenharmony_ci 15262306a36Sopenharmony_cistatic struct platform_device gpr_mtd_device = { 15362306a36Sopenharmony_ci .name = "physmap-flash", 15462306a36Sopenharmony_ci .dev = { 15562306a36Sopenharmony_ci .platform_data = &gpr_flash_data, 15662306a36Sopenharmony_ci }, 15762306a36Sopenharmony_ci .num_resources = 1, 15862306a36Sopenharmony_ci .resource = &gpr_mtd_resource, 15962306a36Sopenharmony_ci}; 16062306a36Sopenharmony_ci 16162306a36Sopenharmony_ci/* 16262306a36Sopenharmony_ci * LEDs 16362306a36Sopenharmony_ci */ 16462306a36Sopenharmony_cistatic const struct gpio_led gpr_gpio_leds[] = { 16562306a36Sopenharmony_ci { /* green */ 16662306a36Sopenharmony_ci .name = "gpr:green", 16762306a36Sopenharmony_ci .gpio = 4, 16862306a36Sopenharmony_ci .active_low = 1, 16962306a36Sopenharmony_ci }, 17062306a36Sopenharmony_ci { /* red */ 17162306a36Sopenharmony_ci .name = "gpr:red", 17262306a36Sopenharmony_ci .gpio = 5, 17362306a36Sopenharmony_ci .active_low = 1, 17462306a36Sopenharmony_ci } 17562306a36Sopenharmony_ci}; 17662306a36Sopenharmony_ci 17762306a36Sopenharmony_cistatic struct gpio_led_platform_data gpr_led_data = { 17862306a36Sopenharmony_ci .num_leds = ARRAY_SIZE(gpr_gpio_leds), 17962306a36Sopenharmony_ci .leds = gpr_gpio_leds, 18062306a36Sopenharmony_ci}; 18162306a36Sopenharmony_ci 18262306a36Sopenharmony_cistatic struct platform_device gpr_led_devices = { 18362306a36Sopenharmony_ci .name = "leds-gpio", 18462306a36Sopenharmony_ci .id = -1, 18562306a36Sopenharmony_ci .dev = { 18662306a36Sopenharmony_ci .platform_data = &gpr_led_data, 18762306a36Sopenharmony_ci } 18862306a36Sopenharmony_ci}; 18962306a36Sopenharmony_ci 19062306a36Sopenharmony_ci/* 19162306a36Sopenharmony_ci * I2C 19262306a36Sopenharmony_ci */ 19362306a36Sopenharmony_cistatic struct gpiod_lookup_table gpr_i2c_gpiod_table = { 19462306a36Sopenharmony_ci .dev_id = "i2c-gpio", 19562306a36Sopenharmony_ci .table = { 19662306a36Sopenharmony_ci /* 19762306a36Sopenharmony_ci * This should be on "GPIO2" which has base at 200 so 19862306a36Sopenharmony_ci * the global numbers 209 and 210 should correspond to 19962306a36Sopenharmony_ci * local offsets 9 and 10. 20062306a36Sopenharmony_ci */ 20162306a36Sopenharmony_ci GPIO_LOOKUP_IDX("alchemy-gpio2", 9, NULL, 0, 20262306a36Sopenharmony_ci GPIO_ACTIVE_HIGH), 20362306a36Sopenharmony_ci GPIO_LOOKUP_IDX("alchemy-gpio2", 10, NULL, 1, 20462306a36Sopenharmony_ci GPIO_ACTIVE_HIGH), 20562306a36Sopenharmony_ci }, 20662306a36Sopenharmony_ci}; 20762306a36Sopenharmony_ci 20862306a36Sopenharmony_cistatic struct i2c_gpio_platform_data gpr_i2c_data = { 20962306a36Sopenharmony_ci /* 21062306a36Sopenharmony_ci * The open drain mode is hardwired somewhere or an electrical 21162306a36Sopenharmony_ci * property of the alchemy GPIO controller. 21262306a36Sopenharmony_ci */ 21362306a36Sopenharmony_ci .sda_is_open_drain = 1, 21462306a36Sopenharmony_ci .scl_is_open_drain = 1, 21562306a36Sopenharmony_ci .udelay = 2, /* ~100 kHz */ 21662306a36Sopenharmony_ci .timeout = HZ, 21762306a36Sopenharmony_ci}; 21862306a36Sopenharmony_ci 21962306a36Sopenharmony_cistatic struct platform_device gpr_i2c_device = { 22062306a36Sopenharmony_ci .name = "i2c-gpio", 22162306a36Sopenharmony_ci .id = -1, 22262306a36Sopenharmony_ci .dev.platform_data = &gpr_i2c_data, 22362306a36Sopenharmony_ci}; 22462306a36Sopenharmony_ci 22562306a36Sopenharmony_cistatic struct i2c_board_info gpr_i2c_info[] __initdata = { 22662306a36Sopenharmony_ci { 22762306a36Sopenharmony_ci I2C_BOARD_INFO("lm83", 0x18), 22862306a36Sopenharmony_ci } 22962306a36Sopenharmony_ci}; 23062306a36Sopenharmony_ci 23162306a36Sopenharmony_ci 23262306a36Sopenharmony_ci 23362306a36Sopenharmony_cistatic struct resource alchemy_pci_host_res[] = { 23462306a36Sopenharmony_ci [0] = { 23562306a36Sopenharmony_ci .start = AU1500_PCI_PHYS_ADDR, 23662306a36Sopenharmony_ci .end = AU1500_PCI_PHYS_ADDR + 0xfff, 23762306a36Sopenharmony_ci .flags = IORESOURCE_MEM, 23862306a36Sopenharmony_ci }, 23962306a36Sopenharmony_ci}; 24062306a36Sopenharmony_ci 24162306a36Sopenharmony_cistatic int gpr_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin) 24262306a36Sopenharmony_ci{ 24362306a36Sopenharmony_ci if ((slot == 0) && (pin == 1)) 24462306a36Sopenharmony_ci return AU1550_PCI_INTA; 24562306a36Sopenharmony_ci else if ((slot == 0) && (pin == 2)) 24662306a36Sopenharmony_ci return AU1550_PCI_INTB; 24762306a36Sopenharmony_ci 24862306a36Sopenharmony_ci return 0xff; 24962306a36Sopenharmony_ci} 25062306a36Sopenharmony_ci 25162306a36Sopenharmony_cistatic struct alchemy_pci_platdata gpr_pci_pd = { 25262306a36Sopenharmony_ci .board_map_irq = gpr_map_pci_irq, 25362306a36Sopenharmony_ci .pci_cfg_set = PCI_CONFIG_AEN | PCI_CONFIG_R2H | PCI_CONFIG_R1H | 25462306a36Sopenharmony_ci PCI_CONFIG_CH | 25562306a36Sopenharmony_ci#if defined(__MIPSEB__) 25662306a36Sopenharmony_ci PCI_CONFIG_SIC_HWA_DAT | PCI_CONFIG_SM, 25762306a36Sopenharmony_ci#else 25862306a36Sopenharmony_ci 0, 25962306a36Sopenharmony_ci#endif 26062306a36Sopenharmony_ci}; 26162306a36Sopenharmony_ci 26262306a36Sopenharmony_cistatic struct platform_device gpr_pci_host_dev = { 26362306a36Sopenharmony_ci .dev.platform_data = &gpr_pci_pd, 26462306a36Sopenharmony_ci .name = "alchemy-pci", 26562306a36Sopenharmony_ci .id = 0, 26662306a36Sopenharmony_ci .num_resources = ARRAY_SIZE(alchemy_pci_host_res), 26762306a36Sopenharmony_ci .resource = alchemy_pci_host_res, 26862306a36Sopenharmony_ci}; 26962306a36Sopenharmony_ci 27062306a36Sopenharmony_cistatic struct platform_device *gpr_devices[] __initdata = { 27162306a36Sopenharmony_ci &gpr_wdt_device, 27262306a36Sopenharmony_ci &gpr_mtd_device, 27362306a36Sopenharmony_ci &gpr_i2c_device, 27462306a36Sopenharmony_ci &gpr_led_devices, 27562306a36Sopenharmony_ci}; 27662306a36Sopenharmony_ci 27762306a36Sopenharmony_cistatic int __init gpr_pci_init(void) 27862306a36Sopenharmony_ci{ 27962306a36Sopenharmony_ci return platform_device_register(&gpr_pci_host_dev); 28062306a36Sopenharmony_ci} 28162306a36Sopenharmony_ci/* must be arch_initcall; MIPS PCI scans busses in a subsys_initcall */ 28262306a36Sopenharmony_ciarch_initcall(gpr_pci_init); 28362306a36Sopenharmony_ci 28462306a36Sopenharmony_ci 28562306a36Sopenharmony_cistatic int __init gpr_dev_init(void) 28662306a36Sopenharmony_ci{ 28762306a36Sopenharmony_ci gpiod_add_lookup_table(&gpr_i2c_gpiod_table); 28862306a36Sopenharmony_ci i2c_register_board_info(0, gpr_i2c_info, ARRAY_SIZE(gpr_i2c_info)); 28962306a36Sopenharmony_ci 29062306a36Sopenharmony_ci return platform_add_devices(gpr_devices, ARRAY_SIZE(gpr_devices)); 29162306a36Sopenharmony_ci} 29262306a36Sopenharmony_cidevice_initcall(gpr_dev_init); 293