162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */
262306a36Sopenharmony_ci#include <linux/linkage.h>
362306a36Sopenharmony_ci
462306a36Sopenharmony_ci/*
562306a36Sopenharmony_ci* modulo operation for 32 bit integers.
662306a36Sopenharmony_ci*	Input :	op1 in Reg r5
762306a36Sopenharmony_ci*		op2 in Reg r6
862306a36Sopenharmony_ci*	Output: op1 mod op2 in Reg r3
962306a36Sopenharmony_ci*/
1062306a36Sopenharmony_ci
1162306a36Sopenharmony_ci	.text
1262306a36Sopenharmony_ci	.globl	__modsi3
1362306a36Sopenharmony_ci	.type __modsi3,  @function
1462306a36Sopenharmony_ci	.ent __modsi3
1562306a36Sopenharmony_ci
1662306a36Sopenharmony_ci__modsi3:
1762306a36Sopenharmony_ci	.frame	r1, 0, r15
1862306a36Sopenharmony_ci
1962306a36Sopenharmony_ci	addik	r1, r1, -16
2062306a36Sopenharmony_ci	swi	r28, r1, 0
2162306a36Sopenharmony_ci	swi	r29, r1, 4
2262306a36Sopenharmony_ci	swi	r30, r1, 8
2362306a36Sopenharmony_ci	swi	r31, r1, 12
2462306a36Sopenharmony_ci
2562306a36Sopenharmony_ci	beqi	r6, div_by_zero /* div_by_zero division error */
2662306a36Sopenharmony_ci	beqi	r5, result_is_zero /* result is zero */
2762306a36Sopenharmony_ci	bgeid	r5, r5_pos
2862306a36Sopenharmony_ci	/* get the sign of the result [ depends only on the first arg] */
2962306a36Sopenharmony_ci	add	r28, r5, r0
3062306a36Sopenharmony_ci	rsubi	r5, r5, 0	 /* make r5 positive */
3162306a36Sopenharmony_cir5_pos:
3262306a36Sopenharmony_ci	bgei	r6, r6_pos
3362306a36Sopenharmony_ci	rsubi	r6, r6, 0	 /* make r6 positive */
3462306a36Sopenharmony_cir6_pos:
3562306a36Sopenharmony_ci	addik	r3, r0, 0 /* clear mod */
3662306a36Sopenharmony_ci	addik	r30, r0, 0 /* clear div */
3762306a36Sopenharmony_ci	addik	r29, r0, 32 /* initialize the loop count */
3862306a36Sopenharmony_ci/* first part try to find the first '1' in the r5 */
3962306a36Sopenharmony_cidiv1:
4062306a36Sopenharmony_ci	add	r5, r5, r5 /* left shift logical r5 */
4162306a36Sopenharmony_ci	bgeid	r5, div1
4262306a36Sopenharmony_ci	addik	r29, r29, -1
4362306a36Sopenharmony_cidiv2:
4462306a36Sopenharmony_ci	/* left shift logical r5 get the '1' into the carry */
4562306a36Sopenharmony_ci	add	r5, r5, r5
4662306a36Sopenharmony_ci	addc	r3, r3, r3 /* move that bit into the mod register */
4762306a36Sopenharmony_ci	rsub	r31, r6, r3 /* try to subtract (r30 a r6) */
4862306a36Sopenharmony_ci	blti	r31, mod_too_small
4962306a36Sopenharmony_ci	/* move the r31 to mod since the result was positive */
5062306a36Sopenharmony_ci	or	r3, r0, r31
5162306a36Sopenharmony_ci	addik	r30, r30, 1
5262306a36Sopenharmony_cimod_too_small:
5362306a36Sopenharmony_ci	addik	r29, r29, -1
5462306a36Sopenharmony_ci	beqi	r29, loop_end
5562306a36Sopenharmony_ci	add	r30, r30, r30 /* shift in the '1' into div */
5662306a36Sopenharmony_ci	bri	div2 /* div2 */
5762306a36Sopenharmony_ciloop_end:
5862306a36Sopenharmony_ci	bgei	r28, return_here
5962306a36Sopenharmony_ci	brid	return_here
6062306a36Sopenharmony_ci	rsubi	r3, r3, 0 /* negate the result */
6162306a36Sopenharmony_cidiv_by_zero:
6262306a36Sopenharmony_ciresult_is_zero:
6362306a36Sopenharmony_ci	or	r3, r0, r0 /* set result to 0 [both mod as well as div are 0] */
6462306a36Sopenharmony_cireturn_here:
6562306a36Sopenharmony_ci/* restore values of csrs and that of r3 and the divisor and the dividend */
6662306a36Sopenharmony_ci	lwi	r28, r1, 0
6762306a36Sopenharmony_ci	lwi	r29, r1, 4
6862306a36Sopenharmony_ci	lwi	r30, r1, 8
6962306a36Sopenharmony_ci	lwi	r31, r1, 12
7062306a36Sopenharmony_ci	rtsd	r15, 8
7162306a36Sopenharmony_ci	addik	r1, r1, 16
7262306a36Sopenharmony_ci
7362306a36Sopenharmony_ci.size __modsi3,  . - __modsi3
7462306a36Sopenharmony_ci.end __modsi3
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