162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Copyright (C) 2022 Xilinx, Inc. 462306a36Sopenharmony_ci */ 562306a36Sopenharmony_ci#ifndef _XILINX_MB_MANAGER_H 662306a36Sopenharmony_ci#define _XILINX_MB_MANAGER_H 762306a36Sopenharmony_ci 862306a36Sopenharmony_ci# ifndef __ASSEMBLY__ 962306a36Sopenharmony_ci 1062306a36Sopenharmony_ci#include <linux/of_address.h> 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ci/* 1362306a36Sopenharmony_ci * When the break vector gets asserted because of error injection, the break 1462306a36Sopenharmony_ci * signal must be blocked before exiting from the break handler, Below api 1562306a36Sopenharmony_ci * updates the manager address and control register and error counter callback 1662306a36Sopenharmony_ci * arguments, which will be used by the break handler to block the break and 1762306a36Sopenharmony_ci * call the callback function. 1862306a36Sopenharmony_ci */ 1962306a36Sopenharmony_civoid xmb_manager_register(uintptr_t phys_baseaddr, u32 cr_val, 2062306a36Sopenharmony_ci void (*callback)(void *data), 2162306a36Sopenharmony_ci void *priv, void (*reset_callback)(void *data)); 2262306a36Sopenharmony_ciasmlinkage void xmb_inject_err(void); 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_ci# endif /* __ASSEMBLY__ */ 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ci/* Error injection offset */ 2762306a36Sopenharmony_ci#define XMB_INJECT_ERR_OFFSET 0x200 2862306a36Sopenharmony_ci 2962306a36Sopenharmony_ci#endif /* _XILINX_MB_MANAGER_H */ 30