1// SPDX-License-Identifier: GPL-2.0 2/* 3 * 6522 Versatile Interface Adapter (VIA) 4 * 5 * There are two of these on the Mac II. Some IRQs are vectored 6 * via them as are assorted bits and bobs - eg RTC, ADB. 7 * 8 * CSA: Motorola seems to have removed documentation on the 6522 from 9 * their web site; try 10 * http://nerini.drf.com/vectrex/other/text/chips/6522/ 11 * http://www.zymurgy.net/classic/vic20/vicdet1.htm 12 * and 13 * http://193.23.168.87/mikro_laborversuche/via_iobaustein/via6522_1.html 14 * for info. A full-text web search on 6522 AND VIA will probably also 15 * net some usefulness. <cananian@alumni.princeton.edu> 20apr1999 16 * 17 * Additional data is here (the SY6522 was used in the Mac II etc): 18 * http://www.6502.org/documents/datasheets/synertek/synertek_sy6522.pdf 19 * http://www.6502.org/documents/datasheets/synertek/synertek_sy6522_programming_reference.pdf 20 * 21 * PRAM/RTC access algorithms are from the NetBSD RTC toolkit version 1.08b 22 * by Erik Vogan and adapted to Linux by Joshua M. Thompson (funaho@jurai.org) 23 * 24 */ 25 26#include <linux/clocksource.h> 27#include <linux/types.h> 28#include <linux/kernel.h> 29#include <linux/mm.h> 30#include <linux/delay.h> 31#include <linux/init.h> 32#include <linux/module.h> 33#include <linux/irq.h> 34 35#include <asm/macintosh.h> 36#include <asm/macints.h> 37#include <asm/mac_via.h> 38#include <asm/mac_psc.h> 39#include <asm/mac_oss.h> 40 41volatile __u8 *via1, *via2; 42int rbv_present; 43int via_alt_mapping; 44EXPORT_SYMBOL(via_alt_mapping); 45static __u8 rbv_clear; 46 47/* 48 * Globals for accessing the VIA chip registers without having to 49 * check if we're hitting a real VIA or an RBV. Normally you could 50 * just hit the combined register (ie, vIER|rIER) but that seems to 51 * break on AV Macs...probably because they actually decode more than 52 * eight address bits. Why can't Apple engineers at least be 53 * _consistently_ lazy? - 1999-05-21 (jmt) 54 */ 55 56static int gIER,gIFR,gBufA,gBufB; 57 58/* 59 * On Macs with a genuine VIA chip there is no way to mask an individual slot 60 * interrupt. This limitation also seems to apply to VIA clone logic cores in 61 * Quadra-like ASICs. (RBV and OSS machines don't have this limitation.) 62 * 63 * We used to fake it by configuring the relevant VIA pin as an output 64 * (to mask the interrupt) or input (to unmask). That scheme did not work on 65 * (at least) the Quadra 700. A NuBus card's /NMRQ signal is an open-collector 66 * circuit (see Designing Cards and Drivers for Macintosh II and Macintosh SE, 67 * p. 10-11 etc) but VIA outputs are not (see datasheet). 68 * 69 * Driving these outputs high must cause the VIA to source current and the 70 * card to sink current when it asserts /NMRQ. Current will flow but the pin 71 * voltage is uncertain and so the /NMRQ condition may still cause a transition 72 * at the VIA2 CA1 input (which explains the lost interrupts). A side effect 73 * is that a disabled slot IRQ can never be tested as pending or not. 74 * 75 * Driving these outputs low doesn't work either. All the slot /NMRQ lines are 76 * (active low) OR'd together to generate the CA1 (aka "SLOTS") interrupt (see 77 * The Guide To Macintosh Family Hardware, 2nd edition p. 167). If we drive a 78 * disabled /NMRQ line low, the falling edge immediately triggers a CA1 79 * interrupt and all slot interrupts after that will generate no transition 80 * and therefore no interrupt, even after being re-enabled. 81 * 82 * So we make the VIA port A I/O lines inputs and use nubus_disabled to keep 83 * track of their states. When any slot IRQ becomes disabled we mask the CA1 84 * umbrella interrupt. Only when all slot IRQs become enabled do we unmask 85 * the CA1 interrupt. It must remain enabled even when cards have no interrupt 86 * handler registered. Drivers must therefore disable a slot interrupt at the 87 * device before they call free_irq (like shared and autovector interrupts). 88 * 89 * There is also a related problem when MacOS is used to boot Linux. A network 90 * card brought up by a MacOS driver may raise an interrupt while Linux boots. 91 * This can be fatal since it can't be handled until the right driver loads 92 * (if such a driver exists at all). Apparently related to this hardware 93 * limitation, "Designing Cards and Drivers", p. 9-8, says that a slot 94 * interrupt with no driver would crash MacOS (the book was written before 95 * the appearance of Macs with RBV or OSS). 96 */ 97 98static u8 nubus_disabled; 99 100void via_debug_dump(void); 101static void via_nubus_init(void); 102 103/* 104 * Initialize the VIAs 105 * 106 * First we figure out where they actually _are_ as well as what type of 107 * VIA we have for VIA2 (it could be a real VIA or an RBV or even an OSS.) 108 * Then we pretty much clear them out and disable all IRQ sources. 109 */ 110 111void __init via_init(void) 112{ 113 via1 = (void *)VIA1_BASE; 114 pr_debug("VIA1 detected at %p\n", via1); 115 116 if (oss_present) { 117 via2 = NULL; 118 rbv_present = 0; 119 } else { 120 switch (macintosh_config->via_type) { 121 122 /* IIci, IIsi, IIvx, IIvi (P6xx), LC series */ 123 124 case MAC_VIA_IICI: 125 via2 = (void *)RBV_BASE; 126 pr_debug("VIA2 (RBV) detected at %p\n", via2); 127 rbv_present = 1; 128 if (macintosh_config->ident == MAC_MODEL_LCIII) { 129 rbv_clear = 0x00; 130 } else { 131 /* on most RBVs (& unlike the VIAs), you */ 132 /* need to set bit 7 when you write to IFR */ 133 /* in order for your clear to occur. */ 134 rbv_clear = 0x80; 135 } 136 gIER = rIER; 137 gIFR = rIFR; 138 gBufA = rSIFR; 139 gBufB = rBufB; 140 break; 141 142 /* Quadra and early MacIIs agree on the VIA locations */ 143 144 case MAC_VIA_QUADRA: 145 case MAC_VIA_II: 146 via2 = (void *) VIA2_BASE; 147 pr_debug("VIA2 detected at %p\n", via2); 148 rbv_present = 0; 149 rbv_clear = 0x00; 150 gIER = vIER; 151 gIFR = vIFR; 152 gBufA = vBufA; 153 gBufB = vBufB; 154 break; 155 156 default: 157 panic("UNKNOWN VIA TYPE"); 158 } 159 } 160 161#ifdef DEBUG_VIA 162 via_debug_dump(); 163#endif 164 165 /* 166 * Shut down all IRQ sources, reset the timers, and 167 * kill the timer latch on VIA1. 168 */ 169 170 via1[vIER] = 0x7F; 171 via1[vIFR] = 0x7F; 172 via1[vT1CL] = 0; 173 via1[vT1CH] = 0; 174 via1[vT2CL] = 0; 175 via1[vT2CH] = 0; 176 via1[vACR] &= ~0xC0; /* setup T1 timer with no PB7 output */ 177 via1[vACR] &= ~0x03; /* disable port A & B latches */ 178 179 /* 180 * SE/30: disable video IRQ 181 */ 182 183 if (macintosh_config->ident == MAC_MODEL_SE30) { 184 via1[vDirB] |= 0x40; 185 via1[vBufB] |= 0x40; 186 } 187 188 switch (macintosh_config->adb_type) { 189 case MAC_ADB_IOP: 190 case MAC_ADB_II: 191 case MAC_ADB_PB1: 192 /* 193 * Set the RTC bits to a known state: all lines to outputs and 194 * RTC disabled (yes that's 0 to enable and 1 to disable). 195 */ 196 via1[vDirB] |= VIA1B_vRTCEnb | VIA1B_vRTCClk | VIA1B_vRTCData; 197 via1[vBufB] |= VIA1B_vRTCEnb | VIA1B_vRTCClk; 198 break; 199 } 200 201 /* Everything below this point is VIA2/RBV only... */ 202 203 if (oss_present) 204 return; 205 206 if ((macintosh_config->via_type == MAC_VIA_QUADRA) && 207 (macintosh_config->adb_type != MAC_ADB_PB1) && 208 (macintosh_config->adb_type != MAC_ADB_PB2) && 209 (macintosh_config->ident != MAC_MODEL_C660) && 210 (macintosh_config->ident != MAC_MODEL_Q840)) { 211 via_alt_mapping = 1; 212 via1[vDirB] |= 0x40; 213 via1[vBufB] &= ~0x40; 214 } else { 215 via_alt_mapping = 0; 216 } 217 218 /* 219 * Now initialize VIA2. For RBV we just kill all interrupts; 220 * for a regular VIA we also reset the timers and stuff. 221 */ 222 223 via2[gIER] = 0x7F; 224 via2[gIFR] = 0x7F | rbv_clear; 225 if (!rbv_present) { 226 via2[vT1CL] = 0; 227 via2[vT1CH] = 0; 228 via2[vT2CL] = 0; 229 via2[vT2CH] = 0; 230 via2[vACR] &= ~0xC0; /* setup T1 timer with no PB7 output */ 231 via2[vACR] &= ~0x03; /* disable port A & B latches */ 232 } 233 234 via_nubus_init(); 235 236 /* Everything below this point is VIA2 only... */ 237 238 if (rbv_present) 239 return; 240 241 /* 242 * Set vPCR for control line interrupts. 243 * 244 * CA1 (SLOTS IRQ), CB1 (ASC IRQ): negative edge trigger. 245 * 246 * Macs with ESP SCSI have a negative edge triggered SCSI interrupt. 247 * Testing reveals that PowerBooks do too. However, the SE/30 248 * schematic diagram shows an active high NCR5380 IRQ line. 249 */ 250 251 pr_debug("VIA2 vPCR is 0x%02X\n", via2[vPCR]); 252 if (macintosh_config->via_type == MAC_VIA_II) { 253 /* CA2 (SCSI DRQ), CB2 (SCSI IRQ): indep. input, pos. edge */ 254 via2[vPCR] = 0x66; 255 } else { 256 /* CA2 (SCSI DRQ), CB2 (SCSI IRQ): indep. input, neg. edge */ 257 via2[vPCR] = 0x22; 258 } 259} 260 261/* 262 * Debugging dump, used in various places to see what's going on. 263 */ 264 265void via_debug_dump(void) 266{ 267 printk(KERN_DEBUG "VIA1: DDRA = 0x%02X DDRB = 0x%02X ACR = 0x%02X\n", 268 (uint) via1[vDirA], (uint) via1[vDirB], (uint) via1[vACR]); 269 printk(KERN_DEBUG " PCR = 0x%02X IFR = 0x%02X IER = 0x%02X\n", 270 (uint) via1[vPCR], (uint) via1[vIFR], (uint) via1[vIER]); 271 if (!via2) 272 return; 273 if (rbv_present) { 274 printk(KERN_DEBUG "VIA2: IFR = 0x%02X IER = 0x%02X\n", 275 (uint) via2[rIFR], (uint) via2[rIER]); 276 printk(KERN_DEBUG " SIFR = 0x%02X SIER = 0x%02X\n", 277 (uint) via2[rSIFR], (uint) via2[rSIER]); 278 } else { 279 printk(KERN_DEBUG "VIA2: DDRA = 0x%02X DDRB = 0x%02X ACR = 0x%02X\n", 280 (uint) via2[vDirA], (uint) via2[vDirB], 281 (uint) via2[vACR]); 282 printk(KERN_DEBUG " PCR = 0x%02X IFR = 0x%02X IER = 0x%02X\n", 283 (uint) via2[vPCR], 284 (uint) via2[vIFR], (uint) via2[vIER]); 285 } 286} 287 288/* 289 * Flush the L2 cache on Macs that have it by flipping 290 * the system into 24-bit mode for an instant. 291 */ 292 293void via_l2_flush(int writeback) 294{ 295 unsigned long flags; 296 297 local_irq_save(flags); 298 via2[gBufB] &= ~VIA2B_vMode32; 299 via2[gBufB] |= VIA2B_vMode32; 300 local_irq_restore(flags); 301} 302 303/* 304 * Initialize VIA2 for Nubus access 305 */ 306 307static void __init via_nubus_init(void) 308{ 309 /* unlock nubus transactions */ 310 311 if ((macintosh_config->adb_type != MAC_ADB_PB1) && 312 (macintosh_config->adb_type != MAC_ADB_PB2)) { 313 /* set the line to be an output on non-RBV machines */ 314 if (!rbv_present) 315 via2[vDirB] |= 0x02; 316 317 /* this seems to be an ADB bit on PMU machines */ 318 /* according to MkLinux. -- jmt */ 319 via2[gBufB] |= 0x02; 320 } 321 322 /* 323 * Disable the slot interrupts. On some hardware that's not possible. 324 * On some hardware it's unclear what all of these I/O lines do. 325 */ 326 327 switch (macintosh_config->via_type) { 328 case MAC_VIA_II: 329 case MAC_VIA_QUADRA: 330 pr_debug("VIA2 vDirA is 0x%02X\n", via2[vDirA]); 331 break; 332 case MAC_VIA_IICI: 333 /* RBV. Disable all the slot interrupts. SIER works like IER. */ 334 via2[rSIER] = 0x7F; 335 break; 336 } 337} 338 339void via_nubus_irq_startup(int irq) 340{ 341 int irq_idx = IRQ_IDX(irq); 342 343 switch (macintosh_config->via_type) { 344 case MAC_VIA_II: 345 case MAC_VIA_QUADRA: 346 /* Make the port A line an input. Probably redundant. */ 347 if (macintosh_config->via_type == MAC_VIA_II) { 348 /* The top two bits are RAM size outputs. */ 349 via2[vDirA] &= 0xC0 | ~(1 << irq_idx); 350 } else { 351 /* Allow NuBus slots 9 through F. */ 352 via2[vDirA] &= 0x80 | ~(1 << irq_idx); 353 } 354 fallthrough; 355 case MAC_VIA_IICI: 356 via_irq_enable(irq); 357 break; 358 } 359} 360 361void via_nubus_irq_shutdown(int irq) 362{ 363 switch (macintosh_config->via_type) { 364 case MAC_VIA_II: 365 case MAC_VIA_QUADRA: 366 /* Ensure that the umbrella CA1 interrupt remains enabled. */ 367 via_irq_enable(irq); 368 break; 369 case MAC_VIA_IICI: 370 via_irq_disable(irq); 371 break; 372 } 373} 374 375/* 376 * The generic VIA interrupt routines (shamelessly stolen from Alan Cox's 377 * via6522.c :-), disable/pending masks added. 378 */ 379 380#define VIA_TIMER_1_INT BIT(6) 381 382void via1_irq(struct irq_desc *desc) 383{ 384 int irq_num; 385 unsigned char irq_bit, events; 386 387 events = via1[vIFR] & via1[vIER] & 0x7F; 388 if (!events) 389 return; 390 391 irq_num = IRQ_MAC_TIMER_1; 392 irq_bit = VIA_TIMER_1_INT; 393 if (events & irq_bit) { 394 unsigned long flags; 395 396 local_irq_save(flags); 397 via1[vIFR] = irq_bit; 398 generic_handle_irq(irq_num); 399 local_irq_restore(flags); 400 401 events &= ~irq_bit; 402 if (!events) 403 return; 404 } 405 406 irq_num = VIA1_SOURCE_BASE; 407 irq_bit = 1; 408 do { 409 if (events & irq_bit) { 410 via1[vIFR] = irq_bit; 411 generic_handle_irq(irq_num); 412 } 413 ++irq_num; 414 irq_bit <<= 1; 415 } while (events >= irq_bit); 416} 417 418static void via2_irq(struct irq_desc *desc) 419{ 420 int irq_num; 421 unsigned char irq_bit, events; 422 423 events = via2[gIFR] & via2[gIER] & 0x7F; 424 if (!events) 425 return; 426 427 irq_num = VIA2_SOURCE_BASE; 428 irq_bit = 1; 429 do { 430 if (events & irq_bit) { 431 via2[gIFR] = irq_bit | rbv_clear; 432 generic_handle_irq(irq_num); 433 } 434 ++irq_num; 435 irq_bit <<= 1; 436 } while (events >= irq_bit); 437} 438 439/* 440 * Dispatch Nubus interrupts. We are called as a secondary dispatch by the 441 * VIA2 dispatcher as a fast interrupt handler. 442 */ 443 444static void via_nubus_irq(struct irq_desc *desc) 445{ 446 int slot_irq; 447 unsigned char slot_bit, events; 448 449 events = ~via2[gBufA] & 0x7F; 450 if (rbv_present) 451 events &= via2[rSIER]; 452 else 453 events &= ~via2[vDirA]; 454 if (!events) 455 return; 456 457 do { 458 slot_irq = IRQ_NUBUS_F; 459 slot_bit = 0x40; 460 do { 461 if (events & slot_bit) { 462 events &= ~slot_bit; 463 generic_handle_irq(slot_irq); 464 } 465 --slot_irq; 466 slot_bit >>= 1; 467 } while (events); 468 469 /* clear the CA1 interrupt and make certain there's no more. */ 470 via2[gIFR] = 0x02 | rbv_clear; 471 events = ~via2[gBufA] & 0x7F; 472 if (rbv_present) 473 events &= via2[rSIER]; 474 else 475 events &= ~via2[vDirA]; 476 } while (events); 477} 478 479/* 480 * Register the interrupt dispatchers for VIA or RBV machines only. 481 */ 482 483void __init via_register_interrupts(void) 484{ 485 if (via_alt_mapping) { 486 /* software interrupt */ 487 irq_set_chained_handler(IRQ_AUTO_1, via1_irq); 488 /* via1 interrupt */ 489 irq_set_chained_handler(IRQ_AUTO_6, via1_irq); 490 } else { 491 irq_set_chained_handler(IRQ_AUTO_1, via1_irq); 492 } 493 irq_set_chained_handler(IRQ_AUTO_2, via2_irq); 494 irq_set_chained_handler(IRQ_MAC_NUBUS, via_nubus_irq); 495} 496 497void via_irq_enable(int irq) { 498 int irq_src = IRQ_SRC(irq); 499 int irq_idx = IRQ_IDX(irq); 500 501 if (irq_src == 1) { 502 via1[vIER] = IER_SET_BIT(irq_idx); 503 } else if (irq_src == 2) { 504 if (irq != IRQ_MAC_NUBUS || nubus_disabled == 0) 505 via2[gIER] = IER_SET_BIT(irq_idx); 506 } else if (irq_src == 7) { 507 switch (macintosh_config->via_type) { 508 case MAC_VIA_II: 509 case MAC_VIA_QUADRA: 510 nubus_disabled &= ~(1 << irq_idx); 511 /* Enable the CA1 interrupt when no slot is disabled. */ 512 if (!nubus_disabled) 513 via2[gIER] = IER_SET_BIT(1); 514 break; 515 case MAC_VIA_IICI: 516 /* On RBV, enable the slot interrupt. 517 * SIER works like IER. 518 */ 519 via2[rSIER] = IER_SET_BIT(irq_idx); 520 break; 521 } 522 } 523} 524 525void via_irq_disable(int irq) { 526 int irq_src = IRQ_SRC(irq); 527 int irq_idx = IRQ_IDX(irq); 528 529 if (irq_src == 1) { 530 via1[vIER] = IER_CLR_BIT(irq_idx); 531 } else if (irq_src == 2) { 532 via2[gIER] = IER_CLR_BIT(irq_idx); 533 } else if (irq_src == 7) { 534 switch (macintosh_config->via_type) { 535 case MAC_VIA_II: 536 case MAC_VIA_QUADRA: 537 nubus_disabled |= 1 << irq_idx; 538 if (nubus_disabled) 539 via2[gIER] = IER_CLR_BIT(1); 540 break; 541 case MAC_VIA_IICI: 542 via2[rSIER] = IER_CLR_BIT(irq_idx); 543 break; 544 } 545 } 546} 547 548void via1_set_head(int head) 549{ 550 if (head == 0) 551 via1[vBufA] &= ~VIA1A_vHeadSel; 552 else 553 via1[vBufA] |= VIA1A_vHeadSel; 554} 555EXPORT_SYMBOL(via1_set_head); 556 557int via2_scsi_drq_pending(void) 558{ 559 return via2[gIFR] & (1 << IRQ_IDX(IRQ_MAC_SCSIDRQ)); 560} 561EXPORT_SYMBOL(via2_scsi_drq_pending); 562 563/* timer and clock source */ 564 565#define VIA_CLOCK_FREQ 783360 /* VIA "phase 2" clock in Hz */ 566#define VIA_TIMER_CYCLES (VIA_CLOCK_FREQ / HZ) /* clock cycles per jiffy */ 567 568#define VIA_TC (VIA_TIMER_CYCLES - 2) /* including 0 and -1 */ 569#define VIA_TC_LOW (VIA_TC & 0xFF) 570#define VIA_TC_HIGH (VIA_TC >> 8) 571 572static u64 mac_read_clk(struct clocksource *cs); 573 574static struct clocksource mac_clk = { 575 .name = "via1", 576 .rating = 250, 577 .read = mac_read_clk, 578 .mask = CLOCKSOURCE_MASK(32), 579 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 580}; 581 582static u32 clk_total, clk_offset; 583 584static irqreturn_t via_timer_handler(int irq, void *dev_id) 585{ 586 clk_total += VIA_TIMER_CYCLES; 587 clk_offset = 0; 588 legacy_timer_tick(1); 589 590 return IRQ_HANDLED; 591} 592 593void __init via_init_clock(void) 594{ 595 if (request_irq(IRQ_MAC_TIMER_1, via_timer_handler, IRQF_TIMER, "timer", 596 NULL)) { 597 pr_err("Couldn't register %s interrupt\n", "timer"); 598 return; 599 } 600 601 via1[vT1CL] = VIA_TC_LOW; 602 via1[vT1CH] = VIA_TC_HIGH; 603 via1[vACR] |= 0x40; 604 605 clocksource_register_hz(&mac_clk, VIA_CLOCK_FREQ); 606} 607 608static u64 mac_read_clk(struct clocksource *cs) 609{ 610 unsigned long flags; 611 u8 count_high; 612 u16 count; 613 u32 ticks; 614 615 /* 616 * Timer counter wrap-around is detected with the timer interrupt flag 617 * but reading the counter low byte (vT1CL) would reset the flag. 618 * Also, accessing both counter registers is essentially a data race. 619 * These problems are avoided by ignoring the low byte. Clock accuracy 620 * is 256 times worse (error can reach 0.327 ms) but CPU overhead is 621 * reduced by avoiding slow VIA register accesses. 622 */ 623 624 local_irq_save(flags); 625 count_high = via1[vT1CH]; 626 if (count_high == 0xFF) 627 count_high = 0; 628 if (count_high > 0 && (via1[vIFR] & VIA_TIMER_1_INT)) 629 clk_offset = VIA_TIMER_CYCLES; 630 count = count_high << 8; 631 ticks = VIA_TIMER_CYCLES - count; 632 ticks += clk_offset + clk_total; 633 local_irq_restore(flags); 634 635 return ticks; 636} 637