162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Operating System Services (OSS) chip handling 462306a36Sopenharmony_ci * Written by Joshua M. Thompson (funaho@jurai.org) 562306a36Sopenharmony_ci * 662306a36Sopenharmony_ci * 762306a36Sopenharmony_ci * This chip is used in the IIfx in place of VIA #2. It acts like a fancy 862306a36Sopenharmony_ci * VIA chip with prorammable interrupt levels. 962306a36Sopenharmony_ci * 1062306a36Sopenharmony_ci * 990502 (jmt) - Major rewrite for new interrupt architecture as well as some 1162306a36Sopenharmony_ci * recent insights into OSS operational details. 1262306a36Sopenharmony_ci * 990610 (jmt) - Now taking full advantage of the OSS. Interrupts are mapped 1362306a36Sopenharmony_ci * to mostly match the A/UX interrupt scheme supported on the 1462306a36Sopenharmony_ci * VIA side. Also added support for enabling the ISM irq again 1562306a36Sopenharmony_ci * since we now have a functional IOP manager. 1662306a36Sopenharmony_ci */ 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ci#include <linux/types.h> 1962306a36Sopenharmony_ci#include <linux/kernel.h> 2062306a36Sopenharmony_ci#include <linux/mm.h> 2162306a36Sopenharmony_ci#include <linux/delay.h> 2262306a36Sopenharmony_ci#include <linux/init.h> 2362306a36Sopenharmony_ci#include <linux/irq.h> 2462306a36Sopenharmony_ci 2562306a36Sopenharmony_ci#include <asm/macintosh.h> 2662306a36Sopenharmony_ci#include <asm/macints.h> 2762306a36Sopenharmony_ci#include <asm/mac_via.h> 2862306a36Sopenharmony_ci#include <asm/mac_oss.h> 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ciint oss_present; 3162306a36Sopenharmony_civolatile struct mac_oss *oss; 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_ci/* 3462306a36Sopenharmony_ci * Initialize the OSS 3562306a36Sopenharmony_ci */ 3662306a36Sopenharmony_ci 3762306a36Sopenharmony_civoid __init oss_init(void) 3862306a36Sopenharmony_ci{ 3962306a36Sopenharmony_ci int i; 4062306a36Sopenharmony_ci 4162306a36Sopenharmony_ci if (macintosh_config->ident != MAC_MODEL_IIFX) 4262306a36Sopenharmony_ci return; 4362306a36Sopenharmony_ci 4462306a36Sopenharmony_ci oss = (struct mac_oss *) OSS_BASE; 4562306a36Sopenharmony_ci pr_debug("OSS detected at %p", oss); 4662306a36Sopenharmony_ci oss_present = 1; 4762306a36Sopenharmony_ci 4862306a36Sopenharmony_ci /* Disable all interrupts. Unlike a VIA it looks like we */ 4962306a36Sopenharmony_ci /* do this by setting the source's interrupt level to zero. */ 5062306a36Sopenharmony_ci 5162306a36Sopenharmony_ci for (i = 0; i < OSS_NUM_SOURCES; i++) 5262306a36Sopenharmony_ci oss->irq_level[i] = 0; 5362306a36Sopenharmony_ci} 5462306a36Sopenharmony_ci 5562306a36Sopenharmony_ci/* 5662306a36Sopenharmony_ci * Handle OSS interrupts. 5762306a36Sopenharmony_ci * XXX how do you clear a pending IRQ? is it even necessary? 5862306a36Sopenharmony_ci */ 5962306a36Sopenharmony_ci 6062306a36Sopenharmony_cistatic void oss_iopism_irq(struct irq_desc *desc) 6162306a36Sopenharmony_ci{ 6262306a36Sopenharmony_ci generic_handle_irq(IRQ_MAC_ADB); 6362306a36Sopenharmony_ci} 6462306a36Sopenharmony_ci 6562306a36Sopenharmony_cistatic void oss_scsi_irq(struct irq_desc *desc) 6662306a36Sopenharmony_ci{ 6762306a36Sopenharmony_ci generic_handle_irq(IRQ_MAC_SCSI); 6862306a36Sopenharmony_ci} 6962306a36Sopenharmony_ci 7062306a36Sopenharmony_cistatic void oss_nubus_irq(struct irq_desc *desc) 7162306a36Sopenharmony_ci{ 7262306a36Sopenharmony_ci u16 events, irq_bit; 7362306a36Sopenharmony_ci int irq_num; 7462306a36Sopenharmony_ci 7562306a36Sopenharmony_ci events = oss->irq_pending & OSS_IP_NUBUS; 7662306a36Sopenharmony_ci irq_num = NUBUS_SOURCE_BASE + 5; 7762306a36Sopenharmony_ci irq_bit = OSS_IP_NUBUS5; 7862306a36Sopenharmony_ci do { 7962306a36Sopenharmony_ci if (events & irq_bit) { 8062306a36Sopenharmony_ci events &= ~irq_bit; 8162306a36Sopenharmony_ci generic_handle_irq(irq_num); 8262306a36Sopenharmony_ci } 8362306a36Sopenharmony_ci --irq_num; 8462306a36Sopenharmony_ci irq_bit >>= 1; 8562306a36Sopenharmony_ci } while (events); 8662306a36Sopenharmony_ci} 8762306a36Sopenharmony_ci 8862306a36Sopenharmony_cistatic void oss_iopscc_irq(struct irq_desc *desc) 8962306a36Sopenharmony_ci{ 9062306a36Sopenharmony_ci generic_handle_irq(IRQ_MAC_SCC); 9162306a36Sopenharmony_ci} 9262306a36Sopenharmony_ci 9362306a36Sopenharmony_ci/* 9462306a36Sopenharmony_ci * Register the OSS and NuBus interrupt dispatchers. 9562306a36Sopenharmony_ci * 9662306a36Sopenharmony_ci * This IRQ mapping is laid out with two things in mind: first, we try to keep 9762306a36Sopenharmony_ci * things on their own levels to avoid having to do double-dispatches. Second, 9862306a36Sopenharmony_ci * the levels match as closely as possible the alternate IRQ mapping mode (aka 9962306a36Sopenharmony_ci * "A/UX mode") available on some VIA machines. 10062306a36Sopenharmony_ci */ 10162306a36Sopenharmony_ci 10262306a36Sopenharmony_ci#define OSS_IRQLEV_IOPISM IRQ_AUTO_1 10362306a36Sopenharmony_ci#define OSS_IRQLEV_SCSI IRQ_AUTO_2 10462306a36Sopenharmony_ci#define OSS_IRQLEV_NUBUS IRQ_AUTO_3 10562306a36Sopenharmony_ci#define OSS_IRQLEV_IOPSCC IRQ_AUTO_4 10662306a36Sopenharmony_ci#define OSS_IRQLEV_VIA1 IRQ_AUTO_6 10762306a36Sopenharmony_ci 10862306a36Sopenharmony_civoid __init oss_register_interrupts(void) 10962306a36Sopenharmony_ci{ 11062306a36Sopenharmony_ci irq_set_chained_handler(OSS_IRQLEV_IOPISM, oss_iopism_irq); 11162306a36Sopenharmony_ci irq_set_chained_handler(OSS_IRQLEV_SCSI, oss_scsi_irq); 11262306a36Sopenharmony_ci irq_set_chained_handler(OSS_IRQLEV_NUBUS, oss_nubus_irq); 11362306a36Sopenharmony_ci irq_set_chained_handler(OSS_IRQLEV_IOPSCC, oss_iopscc_irq); 11462306a36Sopenharmony_ci irq_set_chained_handler(OSS_IRQLEV_VIA1, via1_irq); 11562306a36Sopenharmony_ci 11662306a36Sopenharmony_ci /* OSS_VIA1 gets enabled here because it has no machspec interrupt. */ 11762306a36Sopenharmony_ci oss->irq_level[OSS_VIA1] = OSS_IRQLEV_VIA1; 11862306a36Sopenharmony_ci} 11962306a36Sopenharmony_ci 12062306a36Sopenharmony_ci/* 12162306a36Sopenharmony_ci * Enable an OSS interrupt 12262306a36Sopenharmony_ci * 12362306a36Sopenharmony_ci * It looks messy but it's rather straightforward. The switch() statement 12462306a36Sopenharmony_ci * just maps the machspec interrupt numbers to the right OSS interrupt 12562306a36Sopenharmony_ci * source (if the OSS handles that interrupt) and then sets the interrupt 12662306a36Sopenharmony_ci * level for that source to nonzero, thus enabling the interrupt. 12762306a36Sopenharmony_ci */ 12862306a36Sopenharmony_ci 12962306a36Sopenharmony_civoid oss_irq_enable(int irq) { 13062306a36Sopenharmony_ci switch(irq) { 13162306a36Sopenharmony_ci case IRQ_MAC_SCC: 13262306a36Sopenharmony_ci oss->irq_level[OSS_IOPSCC] = OSS_IRQLEV_IOPSCC; 13362306a36Sopenharmony_ci return; 13462306a36Sopenharmony_ci case IRQ_MAC_ADB: 13562306a36Sopenharmony_ci oss->irq_level[OSS_IOPISM] = OSS_IRQLEV_IOPISM; 13662306a36Sopenharmony_ci return; 13762306a36Sopenharmony_ci case IRQ_MAC_SCSI: 13862306a36Sopenharmony_ci oss->irq_level[OSS_SCSI] = OSS_IRQLEV_SCSI; 13962306a36Sopenharmony_ci return; 14062306a36Sopenharmony_ci case IRQ_NUBUS_9: 14162306a36Sopenharmony_ci case IRQ_NUBUS_A: 14262306a36Sopenharmony_ci case IRQ_NUBUS_B: 14362306a36Sopenharmony_ci case IRQ_NUBUS_C: 14462306a36Sopenharmony_ci case IRQ_NUBUS_D: 14562306a36Sopenharmony_ci case IRQ_NUBUS_E: 14662306a36Sopenharmony_ci irq -= NUBUS_SOURCE_BASE; 14762306a36Sopenharmony_ci oss->irq_level[irq] = OSS_IRQLEV_NUBUS; 14862306a36Sopenharmony_ci return; 14962306a36Sopenharmony_ci } 15062306a36Sopenharmony_ci 15162306a36Sopenharmony_ci if (IRQ_SRC(irq) == 1) 15262306a36Sopenharmony_ci via_irq_enable(irq); 15362306a36Sopenharmony_ci} 15462306a36Sopenharmony_ci 15562306a36Sopenharmony_ci/* 15662306a36Sopenharmony_ci * Disable an OSS interrupt 15762306a36Sopenharmony_ci * 15862306a36Sopenharmony_ci * Same as above except we set the source's interrupt level to zero, 15962306a36Sopenharmony_ci * to disable the interrupt. 16062306a36Sopenharmony_ci */ 16162306a36Sopenharmony_ci 16262306a36Sopenharmony_civoid oss_irq_disable(int irq) { 16362306a36Sopenharmony_ci switch(irq) { 16462306a36Sopenharmony_ci case IRQ_MAC_SCC: 16562306a36Sopenharmony_ci oss->irq_level[OSS_IOPSCC] = 0; 16662306a36Sopenharmony_ci return; 16762306a36Sopenharmony_ci case IRQ_MAC_ADB: 16862306a36Sopenharmony_ci oss->irq_level[OSS_IOPISM] = 0; 16962306a36Sopenharmony_ci return; 17062306a36Sopenharmony_ci case IRQ_MAC_SCSI: 17162306a36Sopenharmony_ci oss->irq_level[OSS_SCSI] = 0; 17262306a36Sopenharmony_ci return; 17362306a36Sopenharmony_ci case IRQ_NUBUS_9: 17462306a36Sopenharmony_ci case IRQ_NUBUS_A: 17562306a36Sopenharmony_ci case IRQ_NUBUS_B: 17662306a36Sopenharmony_ci case IRQ_NUBUS_C: 17762306a36Sopenharmony_ci case IRQ_NUBUS_D: 17862306a36Sopenharmony_ci case IRQ_NUBUS_E: 17962306a36Sopenharmony_ci irq -= NUBUS_SOURCE_BASE; 18062306a36Sopenharmony_ci oss->irq_level[irq] = 0; 18162306a36Sopenharmony_ci return; 18262306a36Sopenharmony_ci } 18362306a36Sopenharmony_ci 18462306a36Sopenharmony_ci if (IRQ_SRC(irq) == 1) 18562306a36Sopenharmony_ci via_irq_disable(irq); 18662306a36Sopenharmony_ci} 187