162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */
262306a36Sopenharmony_ci#ifndef _ASM_HASH_H
362306a36Sopenharmony_ci#define _ASM_HASH_H
462306a36Sopenharmony_ci
562306a36Sopenharmony_ci/*
662306a36Sopenharmony_ci * If CONFIG_M68000=y (original mc68000/010), this file is #included
762306a36Sopenharmony_ci * to work around the lack of a MULU.L instruction.
862306a36Sopenharmony_ci */
962306a36Sopenharmony_ci
1062306a36Sopenharmony_ci#define HAVE_ARCH__HASH_32 1
1162306a36Sopenharmony_ci/*
1262306a36Sopenharmony_ci * While it would be legal to substitute a different hash operation
1362306a36Sopenharmony_ci * entirely, let's keep it simple and just use an optimized multiply
1462306a36Sopenharmony_ci * by GOLDEN_RATIO_32 = 0x61C88647.
1562306a36Sopenharmony_ci *
1662306a36Sopenharmony_ci * The best way to do that appears to be to multiply by 0x8647 with
1762306a36Sopenharmony_ci * shifts and adds, and use mulu.w to multiply the high half by 0x61C8.
1862306a36Sopenharmony_ci *
1962306a36Sopenharmony_ci * Because the 68000 has multi-cycle shifts, this addition chain is
2062306a36Sopenharmony_ci * chosen to minimise the shift distances.
2162306a36Sopenharmony_ci *
2262306a36Sopenharmony_ci * Despite every attempt to spoon-feed it simple operations, GCC
2362306a36Sopenharmony_ci * 6.1.1 doggedly insists on doing annoying things like converting
2462306a36Sopenharmony_ci * "lsl.l #2,<reg>" (12 cycles) to two adds (8+8 cycles).
2562306a36Sopenharmony_ci *
2662306a36Sopenharmony_ci * It also likes to notice two shifts in a row, like "a = x << 2" and
2762306a36Sopenharmony_ci * "a <<= 7", and convert that to "a = x << 9".  But shifts longer
2862306a36Sopenharmony_ci * than 8 bits are extra-slow on m68k, so that's a lose.
2962306a36Sopenharmony_ci *
3062306a36Sopenharmony_ci * Since the 68000 is a very simple in-order processor with no
3162306a36Sopenharmony_ci * instruction scheduling effects on execution time, we can safely
3262306a36Sopenharmony_ci * take it out of GCC's hands and write one big asm() block.
3362306a36Sopenharmony_ci *
3462306a36Sopenharmony_ci * Without calling overhead, this operation is 30 bytes (14 instructions
3562306a36Sopenharmony_ci * plus one immediate constant) and 166 cycles.
3662306a36Sopenharmony_ci *
3762306a36Sopenharmony_ci * (Because %2 is fetched twice, it can't be postincrement, and thus it
3862306a36Sopenharmony_ci * can't be a fully general "g" or "m".  Register is preferred, but
3962306a36Sopenharmony_ci * offsettable memory or immediate will work.)
4062306a36Sopenharmony_ci */
4162306a36Sopenharmony_cistatic inline u32 __attribute_const__ __hash_32(u32 x)
4262306a36Sopenharmony_ci{
4362306a36Sopenharmony_ci	u32 a, b;
4462306a36Sopenharmony_ci
4562306a36Sopenharmony_ci	asm(   "move.l %2,%0"	/* a = x * 0x0001 */
4662306a36Sopenharmony_ci	"\n	lsl.l #2,%0"	/* a = x * 0x0004 */
4762306a36Sopenharmony_ci	"\n	move.l %0,%1"
4862306a36Sopenharmony_ci	"\n	lsl.l #7,%0"	/* a = x * 0x0200 */
4962306a36Sopenharmony_ci	"\n	add.l %2,%0"	/* a = x * 0x0201 */
5062306a36Sopenharmony_ci	"\n	add.l %0,%1"	/* b = x * 0x0205 */
5162306a36Sopenharmony_ci	"\n	add.l %0,%0"	/* a = x * 0x0402 */
5262306a36Sopenharmony_ci	"\n	add.l %0,%1"	/* b = x * 0x0607 */
5362306a36Sopenharmony_ci	"\n	lsl.l #5,%0"	/* a = x * 0x8040 */
5462306a36Sopenharmony_ci	: "=&d,d" (a), "=&r,r" (b)
5562306a36Sopenharmony_ci	: "r,roi?" (x));	/* a+b = x*0x8647 */
5662306a36Sopenharmony_ci
5762306a36Sopenharmony_ci	return ((u16)(x*0x61c8) << 16) + a + b;
5862306a36Sopenharmony_ci}
5962306a36Sopenharmony_ci
6062306a36Sopenharmony_ci#endif	/* _ASM_HASH_H */
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