162306a36Sopenharmony_ci~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 262306a36Sopenharmony_ciMOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP 362306a36Sopenharmony_ciM68000 Hi-Performance Microprocessor Division 462306a36Sopenharmony_ciM68060 Software Package 562306a36Sopenharmony_ciProduction Release P1.00 -- October 10, 1994 662306a36Sopenharmony_ci 762306a36Sopenharmony_ciM68060 Software Package Copyright © 1993, 1994 Motorola Inc. All rights reserved. 862306a36Sopenharmony_ci 962306a36Sopenharmony_ciTHE SOFTWARE is provided on an "AS IS" basis and without warranty. 1062306a36Sopenharmony_ciTo the maximum extent permitted by applicable law, 1162306a36Sopenharmony_ciMOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, 1262306a36Sopenharmony_ciINCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 1362306a36Sopenharmony_ciand any warranty against infringement with regard to the SOFTWARE 1462306a36Sopenharmony_ci(INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials. 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_ciTo the maximum extent permitted by applicable law, 1762306a36Sopenharmony_ciIN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER 1862306a36Sopenharmony_ci(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, 1962306a36Sopenharmony_ciBUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) 2062306a36Sopenharmony_ciARISING OF THE USE OR INABILITY TO USE THE SOFTWARE. 2162306a36Sopenharmony_ciMotorola assumes no responsibility for the maintenance and support of the SOFTWARE. 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_ciYou are hereby granted a copyright license to use, modify, and distribute the SOFTWARE 2462306a36Sopenharmony_ciso long as this entire notice is retained without alteration in any modified and/or 2562306a36Sopenharmony_ciredistributed versions, and that such modified versions are clearly identified as such. 2662306a36Sopenharmony_ciNo licenses are granted by implication, estoppel or otherwise under any patents 2762306a36Sopenharmony_cior trademarks of Motorola, Inc. 2862306a36Sopenharmony_ci~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ciCHANGES SINCE LAST RELEASE: 3162306a36Sopenharmony_ci--------------------------- 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_ci1) "movep" emulation where data was being read from memory 3462306a36Sopenharmony_ciwas reading the intermediate bytes. Emulation now only 3562306a36Sopenharmony_cireads the required bytes. 3662306a36Sopenharmony_ci 3762306a36Sopenharmony_ci2) "flogn", "flog2", and "flog10" of "1" was setting the 3862306a36Sopenharmony_ciInexact FPSR bit. Emulation now does not set Inexact for 3962306a36Sopenharmony_cithis case. 4062306a36Sopenharmony_ci 4162306a36Sopenharmony_ci3) For an opclass three FP instruction where the effective addressing 4262306a36Sopenharmony_cimode was pre-decrement or post-increment and the address register 4362306a36Sopenharmony_ciwas A0 or A1, the address register was not being updated as a result 4462306a36Sopenharmony_ciof the operation. This has been corrected. 4562306a36Sopenharmony_ci 4662306a36Sopenharmony_ci4) Beta B.2 version had the following erratum: 4762306a36Sopenharmony_ci 4862306a36Sopenharmony_ci Scenario: 4962306a36Sopenharmony_ci --------- 5062306a36Sopenharmony_ci If {i,d}mem_{read,write}_{byte,word,long}() returns 5162306a36Sopenharmony_ci a failing value to the 68060SP, the package ignores 5262306a36Sopenharmony_ci this return value and continues with program execution 5362306a36Sopenharmony_ci as if it never received a failing value. 5462306a36Sopenharmony_ci 5562306a36Sopenharmony_ci Effect: 5662306a36Sopenharmony_ci ------- 5762306a36Sopenharmony_ci For example, if a user executed "fsin.x ADDR,fp0" where 5862306a36Sopenharmony_ci ADDR should cause a "segmentation violation", the memory read 5962306a36Sopenharmony_ci requested by the package should return a failing value 6062306a36Sopenharmony_ci to the package. Since the package currently ignores this 6162306a36Sopenharmony_ci return value, the user program will continue to the 6262306a36Sopenharmony_ci next instruction, and the result created in fp0 will be 6362306a36Sopenharmony_ci undefined. 6462306a36Sopenharmony_ci 6562306a36Sopenharmony_ci Fix: 6662306a36Sopenharmony_ci ---- 6762306a36Sopenharmony_ci This has been fixed in the current release. 6862306a36Sopenharmony_ci 6962306a36Sopenharmony_ci Notes: 7062306a36Sopenharmony_ci ------ 7162306a36Sopenharmony_ci Upon receiving a non-zero (failing) return value from 7262306a36Sopenharmony_ci a {i,d}mem_{read,write}_{byte,word,long}() "call-out", 7362306a36Sopenharmony_ci the package creates a 16-byte access error stack frame 7462306a36Sopenharmony_ci from the current exception stack frame and exits 7562306a36Sopenharmony_ci through the "call-out" _real_access(). This is the process 7662306a36Sopenharmony_ci as described in the MC68060 User's Manual. 7762306a36Sopenharmony_ci 7862306a36Sopenharmony_ci For instruction read access errors, the info stacked is: 7962306a36Sopenharmony_ci SR = SR at time of exception 8062306a36Sopenharmony_ci PC = PC of instruction being emulated 8162306a36Sopenharmony_ci VOFF = $4008 (stack frame format type) 8262306a36Sopenharmony_ci ADDRESS = PC of instruction being emulated 8362306a36Sopenharmony_ci FSLW = FAULT STATUS LONGWORD 8462306a36Sopenharmony_ci 8562306a36Sopenharmony_ci The valid FSLW bits are: 8662306a36Sopenharmony_ci bit 27 = 1 (misaligned bit) 8762306a36Sopenharmony_ci bit 24 = 1 (read) 8862306a36Sopenharmony_ci bit 23 = 0 (write) 8962306a36Sopenharmony_ci bit 22:21 = 10 (SIZE = word) 9062306a36Sopenharmony_ci bit 20:19 = 00 (TT) 9162306a36Sopenharmony_ci bit 18:16 = x10 (TM; x = 1 for supervisor mode) 9262306a36Sopenharmony_ci bit 15 = 1 (IO) 9362306a36Sopenharmony_ci bit 0 = 1 (Software Emulation Error) 9462306a36Sopenharmony_ci 9562306a36Sopenharmony_ci all other bits are EQUAL TO ZERO and can be set by the _real_access() 9662306a36Sopenharmony_ci "call-out" stub by the user as appropriate. The MC68060 User's Manual 9762306a36Sopenharmony_ci stated that ONLY "bit 0" would be set. The 060SP attempts to set a few 9862306a36Sopenharmony_ci other bits. 9962306a36Sopenharmony_ci 10062306a36Sopenharmony_ci For data read/write access errors, the info stacked is: 10162306a36Sopenharmony_ci SR = SR at time of exception 10262306a36Sopenharmony_ci PC = PC of instruction being emulated 10362306a36Sopenharmony_ci VOFF = $4008 (stack frame format type) 10462306a36Sopenharmony_ci ADDRESS = Address of source or destination operand 10562306a36Sopenharmony_ci FSLW = FAULT STATUS LONGWORD 10662306a36Sopenharmony_ci 10762306a36Sopenharmony_ci The valid FSLW bits are: 10862306a36Sopenharmony_ci bit 27 = 0 (misaligned bit) 10962306a36Sopenharmony_ci bit 24 = x (read; 1 if read, 0 if write) 11062306a36Sopenharmony_ci bit 23 = x (write; 1 if write, 0 if read) 11162306a36Sopenharmony_ci bit 22:21 = xx (SIZE; see MC68060 User's Manual) 11262306a36Sopenharmony_ci bit 20:19 = 00 (TT) 11362306a36Sopenharmony_ci bit 18:16 = x01 (TM; x = 1 for supervisor mode) 11462306a36Sopenharmony_ci bit 15 = 0 (IO) 11562306a36Sopenharmony_ci bit 0 = 1 (Software Emulation Error) 11662306a36Sopenharmony_ci 11762306a36Sopenharmony_ci all other bits are EQUAL TO ZERO and can be set by the _real_access() 11862306a36Sopenharmony_ci "call-out" stub by the user as appropriate. The MC68060 User's Manual 11962306a36Sopenharmony_ci stated that ONLY "bit 0" would be set. The 060SP attempts to set a few 12062306a36Sopenharmony_ci other bits. 121