162306a36Sopenharmony_ci|
262306a36Sopenharmony_ci|	smovecr.sa 3.1 12/10/90
362306a36Sopenharmony_ci|
462306a36Sopenharmony_ci|	The entry point sMOVECR returns the constant at the
562306a36Sopenharmony_ci|	offset given in the instruction field.
662306a36Sopenharmony_ci|
762306a36Sopenharmony_ci|	Input: An offset in the instruction word.
862306a36Sopenharmony_ci|
962306a36Sopenharmony_ci|	Output:	The constant rounded to the user's rounding
1062306a36Sopenharmony_ci|		mode unchecked for overflow.
1162306a36Sopenharmony_ci|
1262306a36Sopenharmony_ci|	Modified: fp0.
1362306a36Sopenharmony_ci|
1462306a36Sopenharmony_ci|
1562306a36Sopenharmony_ci|		Copyright (C) Motorola, Inc. 1990
1662306a36Sopenharmony_ci|			All Rights Reserved
1762306a36Sopenharmony_ci|
1862306a36Sopenharmony_ci|       For details on the license for this file, please see the
1962306a36Sopenharmony_ci|       file, README, in this same directory.
2062306a36Sopenharmony_ci
2162306a36Sopenharmony_ci|SMOVECR	idnt	2,1 | Motorola 040 Floating Point Software Package
2262306a36Sopenharmony_ci
2362306a36Sopenharmony_ci	|section 8
2462306a36Sopenharmony_ci
2562306a36Sopenharmony_ci#include "fpsp.h"
2662306a36Sopenharmony_ci
2762306a36Sopenharmony_ci	|xref	nrm_set
2862306a36Sopenharmony_ci	|xref	round
2962306a36Sopenharmony_ci	|xref	PIRN
3062306a36Sopenharmony_ci	|xref	PIRZRM
3162306a36Sopenharmony_ci	|xref	PIRP
3262306a36Sopenharmony_ci	|xref	SMALRN
3362306a36Sopenharmony_ci	|xref	SMALRZRM
3462306a36Sopenharmony_ci	|xref	SMALRP
3562306a36Sopenharmony_ci	|xref	BIGRN
3662306a36Sopenharmony_ci	|xref	BIGRZRM
3762306a36Sopenharmony_ci	|xref	BIGRP
3862306a36Sopenharmony_ci
3962306a36Sopenharmony_ciFZERO:	.long	00000000
4062306a36Sopenharmony_ci|
4162306a36Sopenharmony_ci|	FMOVECR
4262306a36Sopenharmony_ci|
4362306a36Sopenharmony_ci	.global	smovcr
4462306a36Sopenharmony_cismovcr:
4562306a36Sopenharmony_ci	bfextu	CMDREG1B(%a6){#9:#7},%d0 |get offset
4662306a36Sopenharmony_ci	bfextu	USER_FPCR(%a6){#26:#2},%d1 |get rmode
4762306a36Sopenharmony_ci|
4862306a36Sopenharmony_ci| check range of offset
4962306a36Sopenharmony_ci|
5062306a36Sopenharmony_ci	tstb	%d0		|if zero, offset is to pi
5162306a36Sopenharmony_ci	beqs	PI_TBL		|it is pi
5262306a36Sopenharmony_ci	cmpib	#0x0a,%d0		|check range $01 - $0a
5362306a36Sopenharmony_ci	bles	Z_VAL		|if in this range, return zero
5462306a36Sopenharmony_ci	cmpib	#0x0e,%d0		|check range $0b - $0e
5562306a36Sopenharmony_ci	bles	SM_TBL		|valid constants in this range
5662306a36Sopenharmony_ci	cmpib	#0x2f,%d0		|check range $10 - $2f
5762306a36Sopenharmony_ci	bles	Z_VAL		|if in this range, return zero
5862306a36Sopenharmony_ci	cmpib	#0x3f,%d0		|check range $30 - $3f
5962306a36Sopenharmony_ci	ble	BG_TBL		|valid constants in this range
6062306a36Sopenharmony_ciZ_VAL:
6162306a36Sopenharmony_ci	fmoves	FZERO,%fp0
6262306a36Sopenharmony_ci	rts
6362306a36Sopenharmony_ciPI_TBL:
6462306a36Sopenharmony_ci	tstb	%d1		|offset is zero, check for rmode
6562306a36Sopenharmony_ci	beqs	PI_RN		|if zero, rn mode
6662306a36Sopenharmony_ci	cmpib	#0x3,%d1		|check for rp
6762306a36Sopenharmony_ci	beqs	PI_RP		|if 3, rp mode
6862306a36Sopenharmony_ciPI_RZRM:
6962306a36Sopenharmony_ci	leal	PIRZRM,%a0	|rmode is rz or rm, load PIRZRM in a0
7062306a36Sopenharmony_ci	bra	set_finx
7162306a36Sopenharmony_ciPI_RN:
7262306a36Sopenharmony_ci	leal	PIRN,%a0		|rmode is rn, load PIRN in a0
7362306a36Sopenharmony_ci	bra	set_finx
7462306a36Sopenharmony_ciPI_RP:
7562306a36Sopenharmony_ci	leal	PIRP,%a0		|rmode is rp, load PIRP in a0
7662306a36Sopenharmony_ci	bra	set_finx
7762306a36Sopenharmony_ciSM_TBL:
7862306a36Sopenharmony_ci	subil	#0xb,%d0		|make offset in 0 - 4 range
7962306a36Sopenharmony_ci	tstb	%d1		|check for rmode
8062306a36Sopenharmony_ci	beqs	SM_RN		|if zero, rn mode
8162306a36Sopenharmony_ci	cmpib	#0x3,%d1		|check for rp
8262306a36Sopenharmony_ci	beqs	SM_RP		|if 3, rp mode
8362306a36Sopenharmony_ciSM_RZRM:
8462306a36Sopenharmony_ci	leal	SMALRZRM,%a0	|rmode is rz or rm, load SMRZRM in a0
8562306a36Sopenharmony_ci	cmpib	#0x2,%d0		|check if result is inex
8662306a36Sopenharmony_ci	ble	set_finx	|if 0 - 2, it is inexact
8762306a36Sopenharmony_ci	bra	no_finx		|if 3, it is exact
8862306a36Sopenharmony_ciSM_RN:
8962306a36Sopenharmony_ci	leal	SMALRN,%a0	|rmode is rn, load SMRN in a0
9062306a36Sopenharmony_ci	cmpib	#0x2,%d0		|check if result is inex
9162306a36Sopenharmony_ci	ble	set_finx	|if 0 - 2, it is inexact
9262306a36Sopenharmony_ci	bra	no_finx		|if 3, it is exact
9362306a36Sopenharmony_ciSM_RP:
9462306a36Sopenharmony_ci	leal	SMALRP,%a0	|rmode is rp, load SMRP in a0
9562306a36Sopenharmony_ci	cmpib	#0x2,%d0		|check if result is inex
9662306a36Sopenharmony_ci	ble	set_finx	|if 0 - 2, it is inexact
9762306a36Sopenharmony_ci	bra	no_finx		|if 3, it is exact
9862306a36Sopenharmony_ciBG_TBL:
9962306a36Sopenharmony_ci	subil	#0x30,%d0		|make offset in 0 - f range
10062306a36Sopenharmony_ci	tstb	%d1		|check for rmode
10162306a36Sopenharmony_ci	beqs	BG_RN		|if zero, rn mode
10262306a36Sopenharmony_ci	cmpib	#0x3,%d1		|check for rp
10362306a36Sopenharmony_ci	beqs	BG_RP		|if 3, rp mode
10462306a36Sopenharmony_ciBG_RZRM:
10562306a36Sopenharmony_ci	leal	BIGRZRM,%a0	|rmode is rz or rm, load BGRZRM in a0
10662306a36Sopenharmony_ci	cmpib	#0x1,%d0		|check if result is inex
10762306a36Sopenharmony_ci	ble	set_finx	|if 0 - 1, it is inexact
10862306a36Sopenharmony_ci	cmpib	#0x7,%d0		|second check
10962306a36Sopenharmony_ci	ble	no_finx		|if 0 - 7, it is exact
11062306a36Sopenharmony_ci	bra	set_finx	|if 8 - f, it is inexact
11162306a36Sopenharmony_ciBG_RN:
11262306a36Sopenharmony_ci	leal	BIGRN,%a0	|rmode is rn, load BGRN in a0
11362306a36Sopenharmony_ci	cmpib	#0x1,%d0		|check if result is inex
11462306a36Sopenharmony_ci	ble	set_finx	|if 0 - 1, it is inexact
11562306a36Sopenharmony_ci	cmpib	#0x7,%d0		|second check
11662306a36Sopenharmony_ci	ble	no_finx		|if 0 - 7, it is exact
11762306a36Sopenharmony_ci	bra	set_finx	|if 8 - f, it is inexact
11862306a36Sopenharmony_ciBG_RP:
11962306a36Sopenharmony_ci	leal	BIGRP,%a0	|rmode is rp, load SMRP in a0
12062306a36Sopenharmony_ci	cmpib	#0x1,%d0		|check if result is inex
12162306a36Sopenharmony_ci	ble	set_finx	|if 0 - 1, it is inexact
12262306a36Sopenharmony_ci	cmpib	#0x7,%d0		|second check
12362306a36Sopenharmony_ci	ble	no_finx		|if 0 - 7, it is exact
12462306a36Sopenharmony_ci|	bra	set_finx	;if 8 - f, it is inexact
12562306a36Sopenharmony_ciset_finx:
12662306a36Sopenharmony_ci	orl	#inx2a_mask,USER_FPSR(%a6) |set inex2/ainex
12762306a36Sopenharmony_cino_finx:
12862306a36Sopenharmony_ci	mulul	#12,%d0			|use offset to point into tables
12962306a36Sopenharmony_ci	movel	%d1,L_SCR1(%a6)		|load mode for round call
13062306a36Sopenharmony_ci	bfextu	USER_FPCR(%a6){#24:#2},%d1	|get precision
13162306a36Sopenharmony_ci	tstl	%d1			|check if extended precision
13262306a36Sopenharmony_ci|
13362306a36Sopenharmony_ci| Precision is extended
13462306a36Sopenharmony_ci|
13562306a36Sopenharmony_ci	bnes	not_ext			|if extended, do not call round
13662306a36Sopenharmony_ci	fmovemx (%a0,%d0),%fp0-%fp0		|return result in fp0
13762306a36Sopenharmony_ci	rts
13862306a36Sopenharmony_ci|
13962306a36Sopenharmony_ci| Precision is single or double
14062306a36Sopenharmony_ci|
14162306a36Sopenharmony_cinot_ext:
14262306a36Sopenharmony_ci	swap	%d1			|rnd prec in upper word of d1
14362306a36Sopenharmony_ci	addl	L_SCR1(%a6),%d1		|merge rmode in low word of d1
14462306a36Sopenharmony_ci	movel	(%a0,%d0),FP_SCR1(%a6)	|load first word to temp storage
14562306a36Sopenharmony_ci	movel	4(%a0,%d0),FP_SCR1+4(%a6)	|load second word
14662306a36Sopenharmony_ci	movel	8(%a0,%d0),FP_SCR1+8(%a6)	|load third word
14762306a36Sopenharmony_ci	clrl	%d0			|clear g,r,s
14862306a36Sopenharmony_ci	lea	FP_SCR1(%a6),%a0
14962306a36Sopenharmony_ci	btstb	#sign_bit,LOCAL_EX(%a0)
15062306a36Sopenharmony_ci	sne	LOCAL_SGN(%a0)		|convert to internal ext. format
15162306a36Sopenharmony_ci
15262306a36Sopenharmony_ci	bsr	round			|go round the mantissa
15362306a36Sopenharmony_ci
15462306a36Sopenharmony_ci	bfclr	LOCAL_SGN(%a0){#0:#8}	|convert back to IEEE ext format
15562306a36Sopenharmony_ci	beqs	fin_fcr
15662306a36Sopenharmony_ci	bsetb	#sign_bit,LOCAL_EX(%a0)
15762306a36Sopenharmony_cifin_fcr:
15862306a36Sopenharmony_ci	fmovemx (%a0),%fp0-%fp0
15962306a36Sopenharmony_ci	rts
16062306a36Sopenharmony_ci
16162306a36Sopenharmony_ci	|end
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