162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0 262306a36Sopenharmony_ci/***************************************************************************/ 362306a36Sopenharmony_ci 462306a36Sopenharmony_ci/* 562306a36Sopenharmony_ci * m5307.c -- platform support for ColdFire 5307 based boards 662306a36Sopenharmony_ci * 762306a36Sopenharmony_ci * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com) 862306a36Sopenharmony_ci * Copyright (C) 2000, Lineo (www.lineo.com) 962306a36Sopenharmony_ci */ 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_ci/***************************************************************************/ 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ci#include <linux/clkdev.h> 1462306a36Sopenharmony_ci#include <linux/kernel.h> 1562306a36Sopenharmony_ci#include <linux/param.h> 1662306a36Sopenharmony_ci#include <linux/init.h> 1762306a36Sopenharmony_ci#include <linux/io.h> 1862306a36Sopenharmony_ci#include <asm/machdep.h> 1962306a36Sopenharmony_ci#include <asm/coldfire.h> 2062306a36Sopenharmony_ci#include <asm/mcfsim.h> 2162306a36Sopenharmony_ci#include <asm/mcfwdebug.h> 2262306a36Sopenharmony_ci#include <asm/mcfclk.h> 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_ci/***************************************************************************/ 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ci/* 2762306a36Sopenharmony_ci * Some platforms need software versions of the GPIO data registers. 2862306a36Sopenharmony_ci */ 2962306a36Sopenharmony_ciunsigned short ppdata; 3062306a36Sopenharmony_ciunsigned char ledbank = 0xff; 3162306a36Sopenharmony_ci 3262306a36Sopenharmony_ci/***************************************************************************/ 3362306a36Sopenharmony_ci 3462306a36Sopenharmony_ciDEFINE_CLK(pll, "pll.0", MCF_CLK); 3562306a36Sopenharmony_ciDEFINE_CLK(sys, "sys.0", MCF_BUSCLK); 3662306a36Sopenharmony_ci 3762306a36Sopenharmony_cistatic struct clk_lookup m5307_clk_lookup[] = { 3862306a36Sopenharmony_ci CLKDEV_INIT(NULL, "pll.0", &clk_pll), 3962306a36Sopenharmony_ci CLKDEV_INIT(NULL, "sys.0", &clk_sys), 4062306a36Sopenharmony_ci CLKDEV_INIT("mcftmr.0", NULL, &clk_sys), 4162306a36Sopenharmony_ci CLKDEV_INIT("mcftmr.1", NULL, &clk_sys), 4262306a36Sopenharmony_ci CLKDEV_INIT("mcfuart.0", NULL, &clk_sys), 4362306a36Sopenharmony_ci CLKDEV_INIT("mcfuart.1", NULL, &clk_sys), 4462306a36Sopenharmony_ci CLKDEV_INIT("imx1-i2c.0", NULL, &clk_sys), 4562306a36Sopenharmony_ci}; 4662306a36Sopenharmony_ci 4762306a36Sopenharmony_ci/***************************************************************************/ 4862306a36Sopenharmony_ci 4962306a36Sopenharmony_cistatic void __init m5307_i2c_init(void) 5062306a36Sopenharmony_ci{ 5162306a36Sopenharmony_ci#if IS_ENABLED(CONFIG_I2C_IMX) 5262306a36Sopenharmony_ci writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0, 5362306a36Sopenharmony_ci MCFSIM_I2CICR); 5462306a36Sopenharmony_ci mcf_mapirq2imr(MCF_IRQ_I2C0, MCFINTC_I2C); 5562306a36Sopenharmony_ci#endif /* IS_ENABLED(CONFIG_I2C_IMX) */ 5662306a36Sopenharmony_ci} 5762306a36Sopenharmony_ci 5862306a36Sopenharmony_ci/***************************************************************************/ 5962306a36Sopenharmony_ci 6062306a36Sopenharmony_civoid __init config_BSP(char *commandp, int size) 6162306a36Sopenharmony_ci{ 6262306a36Sopenharmony_ci#if defined(CONFIG_NETtel) || \ 6362306a36Sopenharmony_ci defined(CONFIG_SECUREEDGEMP3) || defined(CONFIG_CLEOPATRA) 6462306a36Sopenharmony_ci /* Copy command line from FLASH to local buffer... */ 6562306a36Sopenharmony_ci memcpy(commandp, (char *) 0xf0004000, size); 6662306a36Sopenharmony_ci commandp[size-1] = 0; 6762306a36Sopenharmony_ci#endif 6862306a36Sopenharmony_ci 6962306a36Sopenharmony_ci mach_sched_init = hw_timer_init; 7062306a36Sopenharmony_ci 7162306a36Sopenharmony_ci /* Only support the external interrupts on their primary level */ 7262306a36Sopenharmony_ci mcf_mapirq2imr(25, MCFINTC_EINT1); 7362306a36Sopenharmony_ci mcf_mapirq2imr(27, MCFINTC_EINT3); 7462306a36Sopenharmony_ci mcf_mapirq2imr(29, MCFINTC_EINT5); 7562306a36Sopenharmony_ci mcf_mapirq2imr(31, MCFINTC_EINT7); 7662306a36Sopenharmony_ci 7762306a36Sopenharmony_ci#ifdef CONFIG_BDM_DISABLE 7862306a36Sopenharmony_ci /* 7962306a36Sopenharmony_ci * Disable the BDM clocking. This also turns off most of the rest of 8062306a36Sopenharmony_ci * the BDM device. This is good for EMC reasons. This option is not 8162306a36Sopenharmony_ci * incompatible with the memory protection option. 8262306a36Sopenharmony_ci */ 8362306a36Sopenharmony_ci wdebug(MCFDEBUG_CSR, MCFDEBUG_CSR_PSTCLK); 8462306a36Sopenharmony_ci#endif 8562306a36Sopenharmony_ci m5307_i2c_init(); 8662306a36Sopenharmony_ci 8762306a36Sopenharmony_ci clkdev_add_table(m5307_clk_lookup, ARRAY_SIZE(m5307_clk_lookup)); 8862306a36Sopenharmony_ci} 8962306a36Sopenharmony_ci 9062306a36Sopenharmony_ci/***************************************************************************/ 91