162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0 262306a36Sopenharmony_ci/***************************************************************************/ 362306a36Sopenharmony_ci 462306a36Sopenharmony_ci/* 562306a36Sopenharmony_ci * m528x.c -- platform support for ColdFire 528x based boards 662306a36Sopenharmony_ci * 762306a36Sopenharmony_ci * Sub-architcture dependent initialization code for the Freescale 862306a36Sopenharmony_ci * 5280, 5281 and 5282 CPUs. 962306a36Sopenharmony_ci * 1062306a36Sopenharmony_ci * Copyright (C) 1999-2003, Greg Ungerer (gerg@snapgear.com) 1162306a36Sopenharmony_ci * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com) 1262306a36Sopenharmony_ci */ 1362306a36Sopenharmony_ci 1462306a36Sopenharmony_ci/***************************************************************************/ 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_ci#include <linux/clkdev.h> 1762306a36Sopenharmony_ci#include <linux/kernel.h> 1862306a36Sopenharmony_ci#include <linux/param.h> 1962306a36Sopenharmony_ci#include <linux/init.h> 2062306a36Sopenharmony_ci#include <linux/platform_device.h> 2162306a36Sopenharmony_ci#include <linux/io.h> 2262306a36Sopenharmony_ci#include <asm/machdep.h> 2362306a36Sopenharmony_ci#include <asm/coldfire.h> 2462306a36Sopenharmony_ci#include <asm/mcfsim.h> 2562306a36Sopenharmony_ci#include <asm/mcfuart.h> 2662306a36Sopenharmony_ci#include <asm/mcfclk.h> 2762306a36Sopenharmony_ci 2862306a36Sopenharmony_ci/***************************************************************************/ 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ciDEFINE_CLK(pll, "pll.0", MCF_CLK); 3162306a36Sopenharmony_ciDEFINE_CLK(sys, "sys.0", MCF_BUSCLK); 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_cistatic struct clk_lookup m528x_clk_lookup[] = { 3462306a36Sopenharmony_ci CLKDEV_INIT(NULL, "pll.0", &clk_pll), 3562306a36Sopenharmony_ci CLKDEV_INIT(NULL, "sys.0", &clk_sys), 3662306a36Sopenharmony_ci CLKDEV_INIT("mcfpit.0", NULL, &clk_pll), 3762306a36Sopenharmony_ci CLKDEV_INIT("mcfpit.1", NULL, &clk_pll), 3862306a36Sopenharmony_ci CLKDEV_INIT("mcfpit.2", NULL, &clk_pll), 3962306a36Sopenharmony_ci CLKDEV_INIT("mcfpit.3", NULL, &clk_pll), 4062306a36Sopenharmony_ci CLKDEV_INIT("mcfuart.0", NULL, &clk_sys), 4162306a36Sopenharmony_ci CLKDEV_INIT("mcfuart.1", NULL, &clk_sys), 4262306a36Sopenharmony_ci CLKDEV_INIT("mcfuart.2", NULL, &clk_sys), 4362306a36Sopenharmony_ci CLKDEV_INIT("mcfqspi.0", NULL, &clk_sys), 4462306a36Sopenharmony_ci CLKDEV_INIT("fec.0", NULL, &clk_sys), 4562306a36Sopenharmony_ci CLKDEV_INIT("imx1-i2c.0", NULL, &clk_sys), 4662306a36Sopenharmony_ci}; 4762306a36Sopenharmony_ci 4862306a36Sopenharmony_ci/***************************************************************************/ 4962306a36Sopenharmony_ci 5062306a36Sopenharmony_cistatic void __init m528x_qspi_init(void) 5162306a36Sopenharmony_ci{ 5262306a36Sopenharmony_ci#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) 5362306a36Sopenharmony_ci /* setup Port QS for QSPI with gpio CS control */ 5462306a36Sopenharmony_ci __raw_writeb(0x07, MCFGPIO_PQSPAR); 5562306a36Sopenharmony_ci#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */ 5662306a36Sopenharmony_ci} 5762306a36Sopenharmony_ci 5862306a36Sopenharmony_ci/***************************************************************************/ 5962306a36Sopenharmony_ci 6062306a36Sopenharmony_cistatic void __init m528x_i2c_init(void) 6162306a36Sopenharmony_ci{ 6262306a36Sopenharmony_ci#if IS_ENABLED(CONFIG_I2C_IMX) 6362306a36Sopenharmony_ci u16 paspar; 6462306a36Sopenharmony_ci 6562306a36Sopenharmony_ci /* setup Port AS Pin Assignment Register for I2C */ 6662306a36Sopenharmony_ci /* set PASPA0 to SCL and PASPA1 to SDA */ 6762306a36Sopenharmony_ci paspar = readw(MCFGPIO_PASPAR); 6862306a36Sopenharmony_ci paspar |= 0xF; 6962306a36Sopenharmony_ci writew(paspar, MCFGPIO_PASPAR); 7062306a36Sopenharmony_ci#endif /* IS_ENABLED(CONFIG_I2C_IMX) */ 7162306a36Sopenharmony_ci} 7262306a36Sopenharmony_ci 7362306a36Sopenharmony_ci/***************************************************************************/ 7462306a36Sopenharmony_ci 7562306a36Sopenharmony_cistatic void __init m528x_uarts_init(void) 7662306a36Sopenharmony_ci{ 7762306a36Sopenharmony_ci u8 port; 7862306a36Sopenharmony_ci 7962306a36Sopenharmony_ci /* make sure PUAPAR is set for UART0 and UART1 */ 8062306a36Sopenharmony_ci port = readb(MCFGPIO_PUAPAR); 8162306a36Sopenharmony_ci port |= 0x03 | (0x03 << 2); 8262306a36Sopenharmony_ci writeb(port, MCFGPIO_PUAPAR); 8362306a36Sopenharmony_ci} 8462306a36Sopenharmony_ci 8562306a36Sopenharmony_ci/***************************************************************************/ 8662306a36Sopenharmony_ci 8762306a36Sopenharmony_cistatic void __init m528x_fec_init(void) 8862306a36Sopenharmony_ci{ 8962306a36Sopenharmony_ci u16 v16; 9062306a36Sopenharmony_ci 9162306a36Sopenharmony_ci /* Set multi-function pins to ethernet mode for fec0 */ 9262306a36Sopenharmony_ci v16 = readw(MCFGPIO_PASPAR); 9362306a36Sopenharmony_ci writew(v16 | 0xf00, MCFGPIO_PASPAR); 9462306a36Sopenharmony_ci writeb(0xc0, MCFGPIO_PEHLPAR); 9562306a36Sopenharmony_ci} 9662306a36Sopenharmony_ci 9762306a36Sopenharmony_ci/***************************************************************************/ 9862306a36Sopenharmony_ci 9962306a36Sopenharmony_ci#ifdef CONFIG_WILDFIRE 10062306a36Sopenharmony_civoid wildfire_halt(void) 10162306a36Sopenharmony_ci{ 10262306a36Sopenharmony_ci writeb(0, 0x30000007); 10362306a36Sopenharmony_ci writeb(0x2, 0x30000007); 10462306a36Sopenharmony_ci} 10562306a36Sopenharmony_ci#endif 10662306a36Sopenharmony_ci 10762306a36Sopenharmony_ci#ifdef CONFIG_WILDFIREMOD 10862306a36Sopenharmony_civoid wildfiremod_halt(void) 10962306a36Sopenharmony_ci{ 11062306a36Sopenharmony_ci printk(KERN_INFO "WildFireMod hibernating...\n"); 11162306a36Sopenharmony_ci 11262306a36Sopenharmony_ci /* Set portE.5 to Digital IO */ 11362306a36Sopenharmony_ci writew(readw(MCFGPIO_PEPAR) & ~(1 << (5 * 2)), MCFGPIO_PEPAR); 11462306a36Sopenharmony_ci 11562306a36Sopenharmony_ci /* Make portE.5 an output */ 11662306a36Sopenharmony_ci writeb(readb(MCFGPIO_PDDR_E) | (1 << 5), MCFGPIO_PDDR_E); 11762306a36Sopenharmony_ci 11862306a36Sopenharmony_ci /* Now toggle portE.5 from low to high */ 11962306a36Sopenharmony_ci writeb(readb(MCFGPIO_PODR_E) & ~(1 << 5), MCFGPIO_PODR_E); 12062306a36Sopenharmony_ci writeb(readb(MCFGPIO_PODR_E) | (1 << 5), MCFGPIO_PODR_E); 12162306a36Sopenharmony_ci 12262306a36Sopenharmony_ci printk(KERN_EMERG "Failed to hibernate. Halting!\n"); 12362306a36Sopenharmony_ci} 12462306a36Sopenharmony_ci#endif 12562306a36Sopenharmony_ci 12662306a36Sopenharmony_civoid __init config_BSP(char *commandp, int size) 12762306a36Sopenharmony_ci{ 12862306a36Sopenharmony_ci#ifdef CONFIG_WILDFIRE 12962306a36Sopenharmony_ci mach_halt = wildfire_halt; 13062306a36Sopenharmony_ci#endif 13162306a36Sopenharmony_ci#ifdef CONFIG_WILDFIREMOD 13262306a36Sopenharmony_ci mach_halt = wildfiremod_halt; 13362306a36Sopenharmony_ci#endif 13462306a36Sopenharmony_ci mach_sched_init = hw_timer_init; 13562306a36Sopenharmony_ci m528x_uarts_init(); 13662306a36Sopenharmony_ci m528x_fec_init(); 13762306a36Sopenharmony_ci m528x_qspi_init(); 13862306a36Sopenharmony_ci m528x_i2c_init(); 13962306a36Sopenharmony_ci 14062306a36Sopenharmony_ci clkdev_add_table(m528x_clk_lookup, ARRAY_SIZE(m528x_clk_lookup)); 14162306a36Sopenharmony_ci} 14262306a36Sopenharmony_ci 14362306a36Sopenharmony_ci/***************************************************************************/ 144