162306a36Sopenharmony_ci/* 262306a36Sopenharmony_ci * intc2.c -- support for the 2nd INTC controller of the 525x 362306a36Sopenharmony_ci * 462306a36Sopenharmony_ci * (C) Copyright 2012, Steven King <sfking@fdwdc.com> 562306a36Sopenharmony_ci * (C) Copyright 2009, Greg Ungerer <gerg@snapgear.com> 662306a36Sopenharmony_ci * 762306a36Sopenharmony_ci * This file is subject to the terms and conditions of the GNU General Public 862306a36Sopenharmony_ci * License. See the file COPYING in the main directory of this archive 962306a36Sopenharmony_ci * for more details. 1062306a36Sopenharmony_ci */ 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ci#include <linux/types.h> 1362306a36Sopenharmony_ci#include <linux/init.h> 1462306a36Sopenharmony_ci#include <linux/kernel.h> 1562306a36Sopenharmony_ci#include <linux/interrupt.h> 1662306a36Sopenharmony_ci#include <linux/irq.h> 1762306a36Sopenharmony_ci#include <linux/io.h> 1862306a36Sopenharmony_ci#include <asm/coldfire.h> 1962306a36Sopenharmony_ci#include <asm/mcfsim.h> 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_cistatic void intc2_irq_gpio_mask(struct irq_data *d) 2262306a36Sopenharmony_ci{ 2362306a36Sopenharmony_ci u32 imr = readl(MCFSIM2_GPIOINTENABLE); 2462306a36Sopenharmony_ci u32 type = irqd_get_trigger_type(d); 2562306a36Sopenharmony_ci int irq = d->irq - MCF_IRQ_GPIO0; 2662306a36Sopenharmony_ci 2762306a36Sopenharmony_ci if (type & IRQ_TYPE_EDGE_RISING) 2862306a36Sopenharmony_ci imr &= ~(0x001 << irq); 2962306a36Sopenharmony_ci if (type & IRQ_TYPE_EDGE_FALLING) 3062306a36Sopenharmony_ci imr &= ~(0x100 << irq); 3162306a36Sopenharmony_ci writel(imr, MCFSIM2_GPIOINTENABLE); 3262306a36Sopenharmony_ci} 3362306a36Sopenharmony_ci 3462306a36Sopenharmony_cistatic void intc2_irq_gpio_unmask(struct irq_data *d) 3562306a36Sopenharmony_ci{ 3662306a36Sopenharmony_ci u32 imr = readl(MCFSIM2_GPIOINTENABLE); 3762306a36Sopenharmony_ci u32 type = irqd_get_trigger_type(d); 3862306a36Sopenharmony_ci int irq = d->irq - MCF_IRQ_GPIO0; 3962306a36Sopenharmony_ci 4062306a36Sopenharmony_ci if (type & IRQ_TYPE_EDGE_RISING) 4162306a36Sopenharmony_ci imr |= (0x001 << irq); 4262306a36Sopenharmony_ci if (type & IRQ_TYPE_EDGE_FALLING) 4362306a36Sopenharmony_ci imr |= (0x100 << irq); 4462306a36Sopenharmony_ci writel(imr, MCFSIM2_GPIOINTENABLE); 4562306a36Sopenharmony_ci} 4662306a36Sopenharmony_ci 4762306a36Sopenharmony_cistatic void intc2_irq_gpio_ack(struct irq_data *d) 4862306a36Sopenharmony_ci{ 4962306a36Sopenharmony_ci u32 imr = 0; 5062306a36Sopenharmony_ci u32 type = irqd_get_trigger_type(d); 5162306a36Sopenharmony_ci int irq = d->irq - MCF_IRQ_GPIO0; 5262306a36Sopenharmony_ci 5362306a36Sopenharmony_ci if (type & IRQ_TYPE_EDGE_RISING) 5462306a36Sopenharmony_ci imr |= (0x001 << irq); 5562306a36Sopenharmony_ci if (type & IRQ_TYPE_EDGE_FALLING) 5662306a36Sopenharmony_ci imr |= (0x100 << irq); 5762306a36Sopenharmony_ci writel(imr, MCFSIM2_GPIOINTCLEAR); 5862306a36Sopenharmony_ci} 5962306a36Sopenharmony_ci 6062306a36Sopenharmony_cistatic int intc2_irq_gpio_set_type(struct irq_data *d, unsigned int f) 6162306a36Sopenharmony_ci{ 6262306a36Sopenharmony_ci if (f & ~IRQ_TYPE_EDGE_BOTH) 6362306a36Sopenharmony_ci return -EINVAL; 6462306a36Sopenharmony_ci return 0; 6562306a36Sopenharmony_ci} 6662306a36Sopenharmony_ci 6762306a36Sopenharmony_cistatic struct irq_chip intc2_irq_gpio_chip = { 6862306a36Sopenharmony_ci .name = "CF-INTC2", 6962306a36Sopenharmony_ci .irq_mask = intc2_irq_gpio_mask, 7062306a36Sopenharmony_ci .irq_unmask = intc2_irq_gpio_unmask, 7162306a36Sopenharmony_ci .irq_ack = intc2_irq_gpio_ack, 7262306a36Sopenharmony_ci .irq_set_type = intc2_irq_gpio_set_type, 7362306a36Sopenharmony_ci}; 7462306a36Sopenharmony_ci 7562306a36Sopenharmony_cistatic int __init mcf_intc2_init(void) 7662306a36Sopenharmony_ci{ 7762306a36Sopenharmony_ci int irq; 7862306a36Sopenharmony_ci 7962306a36Sopenharmony_ci /* set the interrupt base for the second interrupt controller */ 8062306a36Sopenharmony_ci writel(MCFINTC2_VECBASE, MCFINTC2_INTBASE); 8162306a36Sopenharmony_ci 8262306a36Sopenharmony_ci /* GPIO interrupt sources */ 8362306a36Sopenharmony_ci for (irq = MCF_IRQ_GPIO0; (irq <= MCF_IRQ_GPIO6); irq++) { 8462306a36Sopenharmony_ci irq_set_chip(irq, &intc2_irq_gpio_chip); 8562306a36Sopenharmony_ci irq_set_handler(irq, handle_edge_irq); 8662306a36Sopenharmony_ci } 8762306a36Sopenharmony_ci 8862306a36Sopenharmony_ci return 0; 8962306a36Sopenharmony_ci} 9062306a36Sopenharmony_ci 9162306a36Sopenharmony_ciarch_initcall(mcf_intc2_init); 92