162306a36Sopenharmony_ci/* 262306a36Sopenharmony_ci * intc2.c -- support for the 2nd INTC controller of the 5249 362306a36Sopenharmony_ci * 462306a36Sopenharmony_ci * (C) Copyright 2009, Greg Ungerer <gerg@snapgear.com> 562306a36Sopenharmony_ci * 662306a36Sopenharmony_ci * This file is subject to the terms and conditions of the GNU General Public 762306a36Sopenharmony_ci * License. See the file COPYING in the main directory of this archive 862306a36Sopenharmony_ci * for more details. 962306a36Sopenharmony_ci */ 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_ci#include <linux/types.h> 1262306a36Sopenharmony_ci#include <linux/init.h> 1362306a36Sopenharmony_ci#include <linux/kernel.h> 1462306a36Sopenharmony_ci#include <linux/interrupt.h> 1562306a36Sopenharmony_ci#include <linux/irq.h> 1662306a36Sopenharmony_ci#include <linux/io.h> 1762306a36Sopenharmony_ci#include <asm/coldfire.h> 1862306a36Sopenharmony_ci#include <asm/mcfsim.h> 1962306a36Sopenharmony_ci 2062306a36Sopenharmony_cistatic void intc2_irq_gpio_mask(struct irq_data *d) 2162306a36Sopenharmony_ci{ 2262306a36Sopenharmony_ci u32 imr; 2362306a36Sopenharmony_ci imr = readl(MCFSIM2_GPIOINTENABLE); 2462306a36Sopenharmony_ci imr &= ~(0x1 << (d->irq - MCF_IRQ_GPIO0)); 2562306a36Sopenharmony_ci writel(imr, MCFSIM2_GPIOINTENABLE); 2662306a36Sopenharmony_ci} 2762306a36Sopenharmony_ci 2862306a36Sopenharmony_cistatic void intc2_irq_gpio_unmask(struct irq_data *d) 2962306a36Sopenharmony_ci{ 3062306a36Sopenharmony_ci u32 imr; 3162306a36Sopenharmony_ci imr = readl(MCFSIM2_GPIOINTENABLE); 3262306a36Sopenharmony_ci imr |= (0x1 << (d->irq - MCF_IRQ_GPIO0)); 3362306a36Sopenharmony_ci writel(imr, MCFSIM2_GPIOINTENABLE); 3462306a36Sopenharmony_ci} 3562306a36Sopenharmony_ci 3662306a36Sopenharmony_cistatic void intc2_irq_gpio_ack(struct irq_data *d) 3762306a36Sopenharmony_ci{ 3862306a36Sopenharmony_ci writel(0x1 << (d->irq - MCF_IRQ_GPIO0), MCFSIM2_GPIOINTCLEAR); 3962306a36Sopenharmony_ci} 4062306a36Sopenharmony_ci 4162306a36Sopenharmony_cistatic struct irq_chip intc2_irq_gpio_chip = { 4262306a36Sopenharmony_ci .name = "CF-INTC2", 4362306a36Sopenharmony_ci .irq_mask = intc2_irq_gpio_mask, 4462306a36Sopenharmony_ci .irq_unmask = intc2_irq_gpio_unmask, 4562306a36Sopenharmony_ci .irq_ack = intc2_irq_gpio_ack, 4662306a36Sopenharmony_ci}; 4762306a36Sopenharmony_ci 4862306a36Sopenharmony_cistatic int __init mcf_intc2_init(void) 4962306a36Sopenharmony_ci{ 5062306a36Sopenharmony_ci int irq; 5162306a36Sopenharmony_ci 5262306a36Sopenharmony_ci /* GPIO interrupt sources */ 5362306a36Sopenharmony_ci for (irq = MCF_IRQ_GPIO0; (irq <= MCF_IRQ_GPIO7); irq++) { 5462306a36Sopenharmony_ci irq_set_chip(irq, &intc2_irq_gpio_chip); 5562306a36Sopenharmony_ci irq_set_handler(irq, handle_edge_irq); 5662306a36Sopenharmony_ci } 5762306a36Sopenharmony_ci 5862306a36Sopenharmony_ci return 0; 5962306a36Sopenharmony_ci} 6062306a36Sopenharmony_ci 6162306a36Sopenharmony_ciarch_initcall(mcf_intc2_init); 62