1/*
2 *  arch/m68k/bvme6000/config.c
3 *
4 *  Copyright (C) 1997 Richard Hirst [richard@sleepie.demon.co.uk]
5 *
6 * Based on:
7 *
8 *  linux/amiga/config.c
9 *
10 *  Copyright (C) 1993 Hamish Macdonald
11 *
12 * This file is subject to the terms and conditions of the GNU General Public
13 * License.  See the file README.legal in the main directory of this archive
14 * for more details.
15 */
16
17#include <linux/types.h>
18#include <linux/kernel.h>
19#include <linux/mm.h>
20#include <linux/tty.h>
21#include <linux/clocksource.h>
22#include <linux/console.h>
23#include <linux/linkage.h>
24#include <linux/init.h>
25#include <linux/major.h>
26#include <linux/rtc.h>
27#include <linux/interrupt.h>
28#include <linux/bcd.h>
29
30#include <asm/bootinfo.h>
31#include <asm/bootinfo-vme.h>
32#include <asm/byteorder.h>
33#include <asm/setup.h>
34#include <asm/irq.h>
35#include <asm/traps.h>
36#include <asm/machdep.h>
37#include <asm/bvme6000hw.h>
38#include <asm/config.h>
39
40static void bvme6000_get_model(char *model);
41extern void bvme6000_sched_init(void);
42extern int bvme6000_hwclk (int, struct rtc_time *);
43extern void bvme6000_reset (void);
44void bvme6000_set_vectors (void);
45
46
47int __init bvme6000_parse_bootinfo(const struct bi_record *bi)
48{
49	if (be16_to_cpu(bi->tag) == BI_VME_TYPE)
50		return 0;
51	else
52		return 1;
53}
54
55void bvme6000_reset(void)
56{
57	volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
58
59	pr_info("\r\n\nCalled bvme6000_reset\r\n"
60		"\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r");
61	/* The string of returns is to delay the reset until the whole
62	 * message is output. */
63	/* Enable the watchdog, via PIT port C bit 4 */
64
65	pit->pcddr	|= 0x10;	/* WDOG enable */
66
67	while(1)
68		;
69}
70
71static void bvme6000_get_model(char *model)
72{
73    sprintf(model, "BVME%d000", m68k_cputype == CPU_68060 ? 6 : 4);
74}
75
76/*
77 * This function is called during kernel startup to initialize
78 * the bvme6000 IRQ handling routines.
79 */
80static void __init bvme6000_init_IRQ(void)
81{
82	m68k_setup_user_interrupt(VEC_USER, 192);
83}
84
85void __init config_bvme6000(void)
86{
87    volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
88
89    /* Board type is only set by newer versions of vmelilo/tftplilo */
90    if (!vme_brdtype) {
91	if (m68k_cputype == CPU_68060)
92	    vme_brdtype = VME_TYPE_BVME6000;
93	else
94	    vme_brdtype = VME_TYPE_BVME4000;
95    }
96#if 0
97    /* Call bvme6000_set_vectors() so ABORT will work, along with BVMBug
98     * debugger.  Note trap_init() will splat the abort vector, but
99     * bvme6000_init_IRQ() will put it back again.  Hopefully. */
100
101    bvme6000_set_vectors();
102#endif
103
104    mach_sched_init      = bvme6000_sched_init;
105    mach_init_IRQ        = bvme6000_init_IRQ;
106    mach_hwclk           = bvme6000_hwclk;
107    mach_reset		 = bvme6000_reset;
108    mach_get_model       = bvme6000_get_model;
109
110    pr_info("Board is %sconfigured as a System Controller\n",
111	    *config_reg_ptr & BVME_CONFIG_SW1 ? "" : "not ");
112
113    /* Now do the PIT configuration */
114
115    pit->pgcr	= 0x00;	/* Unidirectional 8 bit, no handshake for now */
116    pit->psrr	= 0x18;	/* PIACK and PIRQ functions enabled */
117    pit->pacr	= 0x00;	/* Sub Mode 00, H2 i/p, no DMA */
118    pit->padr	= 0x00;	/* Just to be tidy! */
119    pit->paddr	= 0x00;	/* All inputs for now (safest) */
120    pit->pbcr	= 0x80;	/* Sub Mode 1x, H4 i/p, no DMA */
121    pit->pbdr	= 0xbc | (*config_reg_ptr & BVME_CONFIG_SW1 ? 0 : 0x40);
122			/* PRI, SYSCON?, Level3, SCC clks from xtal */
123    pit->pbddr	= 0xf3;	/* Mostly outputs */
124    pit->pcdr	= 0x01;	/* PA transceiver disabled */
125    pit->pcddr	= 0x03;	/* WDOG disable */
126
127    /* Disable snooping for Ethernet and VME accesses */
128
129    bvme_acr_addrctl = 0;
130}
131
132
133irqreturn_t bvme6000_abort_int (int irq, void *dev_id)
134{
135        unsigned long *new = (unsigned long *)vectors;
136        unsigned long *old = (unsigned long *)0xf8000000;
137
138        /* Wait for button release */
139        while (*(volatile unsigned char *)BVME_LOCAL_IRQ_STAT & BVME_ABORT_STATUS)
140                ;
141
142        *(new+4) = *(old+4);            /* Illegal instruction */
143        *(new+9) = *(old+9);            /* Trace */
144        *(new+47) = *(old+47);          /* Trap #15 */
145        *(new+0x1f) = *(old+0x1f);      /* ABORT switch */
146	return IRQ_HANDLED;
147}
148
149static u64 bvme6000_read_clk(struct clocksource *cs);
150
151static struct clocksource bvme6000_clk = {
152	.name   = "rtc",
153	.rating = 250,
154	.read   = bvme6000_read_clk,
155	.mask   = CLOCKSOURCE_MASK(32),
156	.flags  = CLOCK_SOURCE_IS_CONTINUOUS,
157};
158
159static u32 clk_total, clk_offset;
160
161#define RTC_TIMER_CLOCK_FREQ 8000000
162#define RTC_TIMER_CYCLES     (RTC_TIMER_CLOCK_FREQ / HZ)
163#define RTC_TIMER_COUNT      ((RTC_TIMER_CYCLES / 2) - 1)
164
165static irqreturn_t bvme6000_timer_int (int irq, void *dev_id)
166{
167    unsigned long flags;
168    volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
169    unsigned char msr;
170
171    local_irq_save(flags);
172    msr = rtc->msr & 0xc0;
173    rtc->msr = msr | 0x20;		/* Ack the interrupt */
174    clk_total += RTC_TIMER_CYCLES;
175    clk_offset = 0;
176    legacy_timer_tick(1);
177    local_irq_restore(flags);
178
179    return IRQ_HANDLED;
180}
181
182/*
183 * Set up the RTC timer 1 to mode 2, so T1 output toggles every 5ms
184 * (40000 x 125ns).  It will interrupt every 10ms, when T1 goes low.
185 * So, when reading the elapsed time, you should read timer1,
186 * subtract it from 39999, and then add 40000 if T1 is high.
187 * That gives you the number of 125ns ticks in to the 10ms period,
188 * so divide by 8 to get the microsecond result.
189 */
190
191void bvme6000_sched_init (void)
192{
193    volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
194    unsigned char msr = rtc->msr & 0xc0;
195
196    rtc->msr = 0;	/* Ensure timer registers accessible */
197
198    if (request_irq(BVME_IRQ_RTC, bvme6000_timer_int, IRQF_TIMER, "timer",
199                    NULL))
200	panic ("Couldn't register timer int");
201
202    rtc->t1cr_omr = 0x04;	/* Mode 2, ext clk */
203    rtc->t1msb = RTC_TIMER_COUNT >> 8;
204    rtc->t1lsb = RTC_TIMER_COUNT & 0xff;
205    rtc->irr_icr1 &= 0xef;	/* Route timer 1 to INTR pin */
206    rtc->msr = 0x40;		/* Access int.cntrl, etc */
207    rtc->pfr_icr0 = 0x80;	/* Just timer 1 ints enabled */
208    rtc->irr_icr1 = 0;
209    rtc->t1cr_omr = 0x0a;	/* INTR+T1 active lo, push-pull */
210    rtc->t0cr_rtmr &= 0xdf;	/* Stop timers in standby */
211    rtc->msr = 0;		/* Access timer 1 control */
212    rtc->t1cr_omr = 0x05;	/* Mode 2, ext clk, GO */
213
214    rtc->msr = msr;
215
216    clocksource_register_hz(&bvme6000_clk, RTC_TIMER_CLOCK_FREQ);
217
218    if (request_irq(BVME_IRQ_ABORT, bvme6000_abort_int, 0,
219				"abort", bvme6000_abort_int))
220	panic ("Couldn't register abort int");
221}
222
223
224/*
225 * NOTE:  Don't accept any readings within 5us of rollover, as
226 * the T1INT bit may be a little slow getting set.  There is also
227 * a fault in the chip, meaning that reads may produce invalid
228 * results...
229 */
230
231static u64 bvme6000_read_clk(struct clocksource *cs)
232{
233    unsigned long flags;
234    volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
235    volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
236    unsigned char msr, msb;
237    unsigned char t1int, t1op;
238    u32 v = 800000, ov;
239
240    local_irq_save(flags);
241
242    msr = rtc->msr & 0xc0;
243    rtc->msr = 0;	/* Ensure timer registers accessible */
244
245    do {
246	ov = v;
247	t1int = rtc->msr & 0x20;
248	t1op  = pit->pcdr & 0x04;
249	rtc->t1cr_omr |= 0x40;		/* Latch timer1 */
250	msb = rtc->t1msb;		/* Read timer1 */
251	v = (msb << 8) | rtc->t1lsb;	/* Read timer1 */
252    } while (t1int != (rtc->msr & 0x20) ||
253		t1op != (pit->pcdr & 0x04) ||
254			abs(ov-v) > 80 ||
255				v > RTC_TIMER_COUNT - (RTC_TIMER_COUNT / 100));
256
257    v = RTC_TIMER_COUNT - v;
258    if (!t1op)				/* If in second half cycle.. */
259	v += RTC_TIMER_CYCLES / 2;
260    if (msb > 0 && t1int)
261	clk_offset = RTC_TIMER_CYCLES;
262    rtc->msr = msr;
263
264    v += clk_offset + clk_total;
265
266    local_irq_restore(flags);
267
268    return v;
269}
270
271/*
272 * Looks like op is non-zero for setting the clock, and zero for
273 * reading the clock.
274 *
275 *  struct hwclk_time {
276 *         unsigned        sec;       0..59
277 *         unsigned        min;       0..59
278 *         unsigned        hour;      0..23
279 *         unsigned        day;       1..31
280 *         unsigned        mon;       0..11
281 *         unsigned        year;      00...
282 *         int             wday;      0..6, 0 is Sunday, -1 means unknown/don't set
283 * };
284 */
285
286int bvme6000_hwclk(int op, struct rtc_time *t)
287{
288	volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
289	unsigned char msr = rtc->msr & 0xc0;
290
291	rtc->msr = 0x40;	/* Ensure clock and real-time-mode-register
292				 * are accessible */
293	if (op)
294	{	/* Write.... */
295		rtc->t0cr_rtmr = t->tm_year%4;
296		rtc->bcd_tenms = 0;
297		rtc->bcd_sec = bin2bcd(t->tm_sec);
298		rtc->bcd_min = bin2bcd(t->tm_min);
299		rtc->bcd_hr  = bin2bcd(t->tm_hour);
300		rtc->bcd_dom = bin2bcd(t->tm_mday);
301		rtc->bcd_mth = bin2bcd(t->tm_mon + 1);
302		rtc->bcd_year = bin2bcd(t->tm_year%100);
303		if (t->tm_wday >= 0)
304			rtc->bcd_dow = bin2bcd(t->tm_wday+1);
305		rtc->t0cr_rtmr = t->tm_year%4 | 0x08;
306	}
307	else
308	{	/* Read....  */
309		do {
310			t->tm_sec  = bcd2bin(rtc->bcd_sec);
311			t->tm_min  = bcd2bin(rtc->bcd_min);
312			t->tm_hour = bcd2bin(rtc->bcd_hr);
313			t->tm_mday = bcd2bin(rtc->bcd_dom);
314			t->tm_mon  = bcd2bin(rtc->bcd_mth)-1;
315			t->tm_year = bcd2bin(rtc->bcd_year);
316			if (t->tm_year < 70)
317				t->tm_year += 100;
318			t->tm_wday = bcd2bin(rtc->bcd_dow)-1;
319		} while (t->tm_sec != bcd2bin(rtc->bcd_sec));
320	}
321
322	rtc->msr = msr;
323
324	return 0;
325}
326