162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Copyright (C) 2020-2022 Loongson Technology Corporation Limited 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Derived from MIPS: 662306a36Sopenharmony_ci * Copyright (C) 1996, 99 Ralf Baechle 762306a36Sopenharmony_ci * Copyright (C) 2000, 2002 Maciej W. Rozycki 862306a36Sopenharmony_ci * Copyright (C) 1990, 1999 by Silicon Graphics, Inc. 962306a36Sopenharmony_ci */ 1062306a36Sopenharmony_ci#ifndef _ASM_ADDRSPACE_H 1162306a36Sopenharmony_ci#define _ASM_ADDRSPACE_H 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ci#include <linux/const.h> 1462306a36Sopenharmony_ci 1562306a36Sopenharmony_ci#include <asm/loongarch.h> 1662306a36Sopenharmony_ci 1762306a36Sopenharmony_ci/* 1862306a36Sopenharmony_ci * This gives the physical RAM offset. 1962306a36Sopenharmony_ci */ 2062306a36Sopenharmony_ci#ifndef __ASSEMBLY__ 2162306a36Sopenharmony_ci#ifndef PHYS_OFFSET 2262306a36Sopenharmony_ci#define PHYS_OFFSET _UL(0) 2362306a36Sopenharmony_ci#endif 2462306a36Sopenharmony_ciextern unsigned long vm_map_base; 2562306a36Sopenharmony_ci#endif /* __ASSEMBLY__ */ 2662306a36Sopenharmony_ci 2762306a36Sopenharmony_ci#ifndef IO_BASE 2862306a36Sopenharmony_ci#define IO_BASE CSR_DMW0_BASE 2962306a36Sopenharmony_ci#endif 3062306a36Sopenharmony_ci 3162306a36Sopenharmony_ci#ifndef CACHE_BASE 3262306a36Sopenharmony_ci#define CACHE_BASE CSR_DMW1_BASE 3362306a36Sopenharmony_ci#endif 3462306a36Sopenharmony_ci 3562306a36Sopenharmony_ci#ifndef UNCACHE_BASE 3662306a36Sopenharmony_ci#define UNCACHE_BASE CSR_DMW0_BASE 3762306a36Sopenharmony_ci#endif 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_ci#define DMW_PABITS 48 4062306a36Sopenharmony_ci#define TO_PHYS_MASK ((1ULL << DMW_PABITS) - 1) 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_ci/* 4362306a36Sopenharmony_ci * Memory above this physical address will be considered highmem. 4462306a36Sopenharmony_ci */ 4562306a36Sopenharmony_ci#ifndef HIGHMEM_START 4662306a36Sopenharmony_ci#define HIGHMEM_START (_UL(1) << _UL(DMW_PABITS)) 4762306a36Sopenharmony_ci#endif 4862306a36Sopenharmony_ci 4962306a36Sopenharmony_ci#define TO_PHYS(x) ( ((x) & TO_PHYS_MASK)) 5062306a36Sopenharmony_ci#define TO_CACHE(x) (CACHE_BASE | ((x) & TO_PHYS_MASK)) 5162306a36Sopenharmony_ci#define TO_UNCACHE(x) (UNCACHE_BASE | ((x) & TO_PHYS_MASK)) 5262306a36Sopenharmony_ci 5362306a36Sopenharmony_ci/* 5462306a36Sopenharmony_ci * This handles the memory map. 5562306a36Sopenharmony_ci */ 5662306a36Sopenharmony_ci#ifndef PAGE_OFFSET 5762306a36Sopenharmony_ci#define PAGE_OFFSET (CACHE_BASE + PHYS_OFFSET) 5862306a36Sopenharmony_ci#endif 5962306a36Sopenharmony_ci 6062306a36Sopenharmony_ci#ifndef FIXADDR_TOP 6162306a36Sopenharmony_ci#define FIXADDR_TOP ((unsigned long)(long)(int)0xfffe0000) 6262306a36Sopenharmony_ci#endif 6362306a36Sopenharmony_ci 6462306a36Sopenharmony_ci#ifdef __ASSEMBLY__ 6562306a36Sopenharmony_ci#define _ATYPE_ 6662306a36Sopenharmony_ci#define _ATYPE32_ 6762306a36Sopenharmony_ci#define _ATYPE64_ 6862306a36Sopenharmony_ci#else 6962306a36Sopenharmony_ci#define _ATYPE_ __PTRDIFF_TYPE__ 7062306a36Sopenharmony_ci#define _ATYPE32_ int 7162306a36Sopenharmony_ci#define _ATYPE64_ __s64 7262306a36Sopenharmony_ci#endif 7362306a36Sopenharmony_ci 7462306a36Sopenharmony_ci#ifdef CONFIG_64BIT 7562306a36Sopenharmony_ci#define _CONST64_(x) _UL(x) 7662306a36Sopenharmony_ci#else 7762306a36Sopenharmony_ci#define _CONST64_(x) _ULL(x) 7862306a36Sopenharmony_ci#endif 7962306a36Sopenharmony_ci 8062306a36Sopenharmony_ci/* 8162306a36Sopenharmony_ci * 32/64-bit LoongArch address spaces 8262306a36Sopenharmony_ci */ 8362306a36Sopenharmony_ci#ifdef __ASSEMBLY__ 8462306a36Sopenharmony_ci#define _ACAST32_ 8562306a36Sopenharmony_ci#define _ACAST64_ 8662306a36Sopenharmony_ci#else 8762306a36Sopenharmony_ci#define _ACAST32_ (_ATYPE_)(_ATYPE32_) /* widen if necessary */ 8862306a36Sopenharmony_ci#define _ACAST64_ (_ATYPE64_) /* do _not_ narrow */ 8962306a36Sopenharmony_ci#endif 9062306a36Sopenharmony_ci 9162306a36Sopenharmony_ci#ifdef CONFIG_32BIT 9262306a36Sopenharmony_ci 9362306a36Sopenharmony_ci#define UVRANGE 0x00000000 9462306a36Sopenharmony_ci#define KPRANGE0 0x80000000 9562306a36Sopenharmony_ci#define KPRANGE1 0xa0000000 9662306a36Sopenharmony_ci#define KVRANGE 0xc0000000 9762306a36Sopenharmony_ci 9862306a36Sopenharmony_ci#else 9962306a36Sopenharmony_ci 10062306a36Sopenharmony_ci#define XUVRANGE _CONST64_(0x0000000000000000) 10162306a36Sopenharmony_ci#define XSPRANGE _CONST64_(0x4000000000000000) 10262306a36Sopenharmony_ci#define XKPRANGE _CONST64_(0x8000000000000000) 10362306a36Sopenharmony_ci#define XKVRANGE _CONST64_(0xc000000000000000) 10462306a36Sopenharmony_ci 10562306a36Sopenharmony_ci#endif 10662306a36Sopenharmony_ci 10762306a36Sopenharmony_ci/* 10862306a36Sopenharmony_ci * Returns the physical address of a KPRANGEx / XKPRANGE address 10962306a36Sopenharmony_ci */ 11062306a36Sopenharmony_ci#define PHYSADDR(a) ((_ACAST64_(a)) & TO_PHYS_MASK) 11162306a36Sopenharmony_ci 11262306a36Sopenharmony_ci/* 11362306a36Sopenharmony_ci * On LoongArch, I/O ports mappring is following: 11462306a36Sopenharmony_ci * 11562306a36Sopenharmony_ci * | .... | 11662306a36Sopenharmony_ci * |-----------------------| 11762306a36Sopenharmony_ci * | pci io ports(16K~32M) | 11862306a36Sopenharmony_ci * |-----------------------| 11962306a36Sopenharmony_ci * | isa io ports(0 ~16K) | 12062306a36Sopenharmony_ci * PCI_IOBASE ->|-----------------------| 12162306a36Sopenharmony_ci * | .... | 12262306a36Sopenharmony_ci */ 12362306a36Sopenharmony_ci#define PCI_IOBASE ((void __iomem *)(vm_map_base + (2 * PAGE_SIZE))) 12462306a36Sopenharmony_ci#define PCI_IOSIZE SZ_32M 12562306a36Sopenharmony_ci#define ISA_IOSIZE SZ_16K 12662306a36Sopenharmony_ci#define IO_SPACE_LIMIT (PCI_IOSIZE - 1) 12762306a36Sopenharmony_ci 12862306a36Sopenharmony_ci#define PHYS_LINK_KADDR PHYSADDR(VMLINUX_LOAD_ADDRESS) 12962306a36Sopenharmony_ci 13062306a36Sopenharmony_ci#endif /* _ASM_ADDRSPACE_H */ 131