xref: /kernel/linux/linux-6.6/arch/ia64/include/asm/io.h (revision 62306a36)
1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_IA64_IO_H
3#define _ASM_IA64_IO_H
4
5/*
6 * This file contains the definitions for the emulated IO instructions
7 * inb/inw/inl/outb/outw/outl and the "string versions" of the same
8 * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
9 * versions of the single-IO instructions (inb_p/inw_p/..).
10 *
11 * This file is not meant to be obfuscating: it's just complicated to
12 * (a) handle it all in a way that makes gcc able to optimize it as
13 * well as possible and (b) trying to avoid writing the same thing
14 * over and over again with slight variations and possibly making a
15 * mistake somewhere.
16 *
17 * Copyright (C) 1998-2003 Hewlett-Packard Co
18 *	David Mosberger-Tang <davidm@hpl.hp.com>
19 * Copyright (C) 1999 Asit Mallick <asit.k.mallick@intel.com>
20 * Copyright (C) 1999 Don Dugger <don.dugger@intel.com>
21 */
22
23#include <asm/unaligned.h>
24#include <asm/early_ioremap.h>
25
26#define __IA64_UNCACHED_OFFSET	RGN_BASE(RGN_UNCACHED)
27
28/*
29 * The legacy I/O space defined by the ia64 architecture supports only 65536 ports, but
30 * large machines may have multiple other I/O spaces so we can't place any a priori limit
31 * on IO_SPACE_LIMIT.  These additional spaces are described in ACPI.
32 */
33#define IO_SPACE_LIMIT		0xffffffffffffffffUL
34
35#define MAX_IO_SPACES_BITS		8
36#define MAX_IO_SPACES			(1UL << MAX_IO_SPACES_BITS)
37#define IO_SPACE_BITS			24
38#define IO_SPACE_SIZE			(1UL << IO_SPACE_BITS)
39
40#define IO_SPACE_NR(port)		((port) >> IO_SPACE_BITS)
41#define IO_SPACE_BASE(space)		((space) << IO_SPACE_BITS)
42#define IO_SPACE_PORT(port)		((port) & (IO_SPACE_SIZE - 1))
43
44#define IO_SPACE_SPARSE_ENCODING(p)	((((p) >> 2) << 12) | ((p) & 0xfff))
45
46struct io_space {
47	unsigned long mmio_base;	/* base in MMIO space */
48	int sparse;
49};
50
51extern struct io_space io_space[];
52extern unsigned int num_io_spaces;
53
54# ifdef __KERNEL__
55
56/*
57 * All MMIO iomem cookies are in region 6; anything less is a PIO cookie:
58 *	0xCxxxxxxxxxxxxxxx	MMIO cookie (return from ioremap)
59 *	0x000000001SPPPPPP	PIO cookie (S=space number, P..P=port)
60 *
61 * ioread/writeX() uses the leading 1 in PIO cookies (PIO_OFFSET) to catch
62 * code that uses bare port numbers without the prerequisite pci_iomap().
63 */
64#define PIO_OFFSET		(1UL << (MAX_IO_SPACES_BITS + IO_SPACE_BITS))
65#define PIO_MASK		(PIO_OFFSET - 1)
66#define PIO_RESERVED		__IA64_UNCACHED_OFFSET
67#define HAVE_ARCH_PIO_SIZE
68
69#include <asm/intrinsics.h>
70#include <asm/page.h>
71#include <asm-generic/iomap.h>
72
73/*
74 * Change virtual addresses to physical addresses and vv.
75 */
76static inline unsigned long
77virt_to_phys (volatile void *address)
78{
79	return (unsigned long) address - PAGE_OFFSET;
80}
81#define virt_to_phys virt_to_phys
82
83static inline void*
84phys_to_virt (unsigned long address)
85{
86	return (void *) (address + PAGE_OFFSET);
87}
88#define phys_to_virt phys_to_virt
89
90#define ARCH_HAS_VALID_PHYS_ADDR_RANGE
91extern u64 kern_mem_attribute (unsigned long phys_addr, unsigned long size);
92extern int valid_phys_addr_range (phys_addr_t addr, size_t count); /* efi.c */
93extern int valid_mmap_phys_addr_range (unsigned long pfn, size_t count);
94
95# endif /* KERNEL */
96
97/*
98 * Memory fence w/accept.  This should never be used in code that is
99 * not IA-64 specific.
100 */
101#define __ia64_mf_a()	ia64_mfa()
102
103static inline void*
104__ia64_mk_io_addr (unsigned long port)
105{
106	struct io_space *space;
107	unsigned long offset;
108
109	space = &io_space[IO_SPACE_NR(port)];
110	port = IO_SPACE_PORT(port);
111	if (space->sparse)
112		offset = IO_SPACE_SPARSE_ENCODING(port);
113	else
114		offset = port;
115
116	return (void *) (space->mmio_base | offset);
117}
118
119/*
120 * For the in/out routines, we need to do "mf.a" _after_ doing the I/O access to ensure
121 * that the access has completed before executing other I/O accesses.  Since we're doing
122 * the accesses through an uncachable (UC) translation, the CPU will execute them in
123 * program order.  However, we still need to tell the compiler not to shuffle them around
124 * during optimization, which is why we use "volatile" pointers.
125 */
126
127#define inb inb
128static inline unsigned int inb(unsigned long port)
129{
130	volatile unsigned char *addr = __ia64_mk_io_addr(port);
131	unsigned char ret;
132
133	ret = *addr;
134	__ia64_mf_a();
135	return ret;
136}
137
138#define inw inw
139static inline unsigned int inw(unsigned long port)
140{
141	volatile unsigned short *addr = __ia64_mk_io_addr(port);
142	unsigned short ret;
143
144	ret = *addr;
145	__ia64_mf_a();
146	return ret;
147}
148
149#define inl inl
150static inline unsigned int inl(unsigned long port)
151{
152	volatile unsigned int *addr = __ia64_mk_io_addr(port);
153	unsigned int ret;
154
155	ret = *addr;
156	__ia64_mf_a();
157	return ret;
158}
159
160#define outb outb
161static inline void outb(unsigned char val, unsigned long port)
162{
163	volatile unsigned char *addr = __ia64_mk_io_addr(port);
164
165	*addr = val;
166	__ia64_mf_a();
167}
168
169#define outw outw
170static inline void outw(unsigned short val, unsigned long port)
171{
172	volatile unsigned short *addr = __ia64_mk_io_addr(port);
173
174	*addr = val;
175	__ia64_mf_a();
176}
177
178#define outl outl
179static inline void outl(unsigned int val, unsigned long port)
180{
181	volatile unsigned int *addr = __ia64_mk_io_addr(port);
182
183	*addr = val;
184	__ia64_mf_a();
185}
186
187#define insb insb
188static inline void insb(unsigned long port, void *dst, unsigned long count)
189{
190	unsigned char *dp = dst;
191
192	while (count--)
193		*dp++ = inb(port);
194}
195
196#define insw insw
197static inline void insw(unsigned long port, void *dst, unsigned long count)
198{
199	unsigned short *dp = dst;
200
201	while (count--)
202		put_unaligned(inw(port), dp++);
203}
204
205#define insl insl
206static inline void insl(unsigned long port, void *dst, unsigned long count)
207{
208	unsigned int *dp = dst;
209
210	while (count--)
211		put_unaligned(inl(port), dp++);
212}
213
214#define outsb outsb
215static inline void outsb(unsigned long port, const void *src,
216		unsigned long count)
217{
218	const unsigned char *sp = src;
219
220	while (count--)
221		outb(*sp++, port);
222}
223
224#define outsw outsw
225static inline void outsw(unsigned long port, const void *src,
226		unsigned long count)
227{
228	const unsigned short *sp = src;
229
230	while (count--)
231		outw(get_unaligned(sp++), port);
232}
233
234#define outsl outsl
235static inline void outsl(unsigned long port, const void *src,
236		unsigned long count)
237{
238	const unsigned int *sp = src;
239
240	while (count--)
241		outl(get_unaligned(sp++), port);
242}
243
244# ifdef __KERNEL__
245
246#define _PAGE_IOREMAP pgprot_val(PAGE_KERNEL)
247
248extern void __iomem * ioremap_uc(unsigned long offset, unsigned long size);
249
250#define ioremap_prot ioremap_prot
251#define ioremap_cache ioremap
252#define ioremap_uc ioremap_uc
253#define iounmap iounmap
254
255/*
256 * String version of IO memory access ops:
257 */
258extern void memcpy_fromio(void *dst, const volatile void __iomem *src, long n);
259extern void memcpy_toio(volatile void __iomem *dst, const void *src, long n);
260extern void memset_io(volatile void __iomem *s, int c, long n);
261
262#define memcpy_fromio memcpy_fromio
263#define memcpy_toio memcpy_toio
264#define memset_io memset_io
265#define xlate_dev_mem_ptr xlate_dev_mem_ptr
266#include <asm-generic/io.h>
267#undef PCI_IOBASE
268
269# endif /* __KERNEL__ */
270
271#endif /* _ASM_IA64_IO_H */
272