162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Device Tree Source for AM6 SoC Family
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
662306a36Sopenharmony_ci */
762306a36Sopenharmony_ci
862306a36Sopenharmony_ci#include <dt-bindings/gpio/gpio.h>
962306a36Sopenharmony_ci#include <dt-bindings/interrupt-controller/irq.h>
1062306a36Sopenharmony_ci#include <dt-bindings/interrupt-controller/arm-gic.h>
1162306a36Sopenharmony_ci#include <dt-bindings/soc/ti,sci_pm_domain.h>
1262306a36Sopenharmony_ci
1362306a36Sopenharmony_ci#include "k3-pinctrl.h"
1462306a36Sopenharmony_ci
1562306a36Sopenharmony_ci/ {
1662306a36Sopenharmony_ci	model = "Texas Instruments K3 AM654 SoC";
1762306a36Sopenharmony_ci	compatible = "ti,am654";
1862306a36Sopenharmony_ci	interrupt-parent = <&gic500>;
1962306a36Sopenharmony_ci	#address-cells = <2>;
2062306a36Sopenharmony_ci	#size-cells = <2>;
2162306a36Sopenharmony_ci
2262306a36Sopenharmony_ci	chosen { };
2362306a36Sopenharmony_ci
2462306a36Sopenharmony_ci	firmware {
2562306a36Sopenharmony_ci		optee {
2662306a36Sopenharmony_ci			compatible = "linaro,optee-tz";
2762306a36Sopenharmony_ci			method = "smc";
2862306a36Sopenharmony_ci		};
2962306a36Sopenharmony_ci
3062306a36Sopenharmony_ci		psci: psci {
3162306a36Sopenharmony_ci			compatible = "arm,psci-1.0";
3262306a36Sopenharmony_ci			method = "smc";
3362306a36Sopenharmony_ci		};
3462306a36Sopenharmony_ci	};
3562306a36Sopenharmony_ci
3662306a36Sopenharmony_ci	a53_timer0: timer-cl0-cpu0 {
3762306a36Sopenharmony_ci		compatible = "arm,armv8-timer";
3862306a36Sopenharmony_ci		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, /* cntpsirq */
3962306a36Sopenharmony_ci			     <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, /* cntpnsirq */
4062306a36Sopenharmony_ci			     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, /* cntvirq */
4162306a36Sopenharmony_ci			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; /* cnthpirq */
4262306a36Sopenharmony_ci	};
4362306a36Sopenharmony_ci
4462306a36Sopenharmony_ci	pmu: pmu {
4562306a36Sopenharmony_ci		compatible = "arm,cortex-a53-pmu";
4662306a36Sopenharmony_ci		/* Recommendation from GIC500 TRM Table A.3 */
4762306a36Sopenharmony_ci		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
4862306a36Sopenharmony_ci	};
4962306a36Sopenharmony_ci
5062306a36Sopenharmony_ci	cbass_main: bus@100000 {
5162306a36Sopenharmony_ci		compatible = "simple-bus";
5262306a36Sopenharmony_ci		#address-cells = <2>;
5362306a36Sopenharmony_ci		#size-cells = <2>;
5462306a36Sopenharmony_ci		ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
5562306a36Sopenharmony_ci			 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
5662306a36Sopenharmony_ci			 <0x00 0x00900000 0x00 0x00900000 0x00 0x00012000>, /* serdes */
5762306a36Sopenharmony_ci			 <0x00 0x01000000 0x00 0x01000000 0x00 0x0af02400>, /* Most peripherals */
5862306a36Sopenharmony_ci			 <0x00 0x30800000 0x00 0x30800000 0x00 0x0bc00000>, /* MAIN NAVSS */
5962306a36Sopenharmony_ci			 <0x00 0x70000000 0x00 0x70000000 0x00 0x00200000>, /* MSMC SRAM */
6062306a36Sopenharmony_ci			 <0x00 0x10000000 0x00 0x10000000 0x00 0x10000000>, /* PCIe DAT */
6162306a36Sopenharmony_ci			 /* MCUSS Range */
6262306a36Sopenharmony_ci			 <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>,
6362306a36Sopenharmony_ci			 <0x00 0x40200000 0x00 0x40200000 0x00 0x00900100>,
6462306a36Sopenharmony_ci			 <0x00 0x40f00000 0x00 0x40f00000 0x00 0x00020000>, /* CTRL_MMR0 */
6562306a36Sopenharmony_ci			 <0x00 0x41000000 0x00 0x41000000 0x00 0x00020000>,
6662306a36Sopenharmony_ci			 <0x00 0x41400000 0x00 0x41400000 0x00 0x00020000>,
6762306a36Sopenharmony_ci			 <0x00 0x41c00000 0x00 0x41c00000 0x00 0x00080000>,
6862306a36Sopenharmony_ci			 <0x00 0x42040000 0x00 0x42040000 0x00 0x03ac2400>,
6962306a36Sopenharmony_ci			 <0x00 0x45100000 0x00 0x45100000 0x00 0x00c24000>,
7062306a36Sopenharmony_ci			 <0x00 0x46000000 0x00 0x46000000 0x00 0x00200000>,
7162306a36Sopenharmony_ci			 <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>,
7262306a36Sopenharmony_ci			 <0x00 0x50000000 0x00 0x50000000 0x00 0x8000000>,
7362306a36Sopenharmony_ci			 <0x00 0x6f000000 0x00 0x6f000000 0x00 0x00310000>, /* A53 PERIPHBASE */
7462306a36Sopenharmony_ci			 <0x00 0x70000000 0x00 0x70000000 0x00 0x200000>,
7562306a36Sopenharmony_ci			 <0x05 0x00000000 0x05 0x00000000 0x01 0x0000000>,
7662306a36Sopenharmony_ci			 <0x07 0x00000000 0x07 0x00000000 0x01 0x0000000>;
7762306a36Sopenharmony_ci
7862306a36Sopenharmony_ci		cbass_mcu: bus@28380000 {
7962306a36Sopenharmony_ci			compatible = "simple-bus";
8062306a36Sopenharmony_ci			#address-cells = <2>;
8162306a36Sopenharmony_ci			#size-cells = <2>;
8262306a36Sopenharmony_ci			ranges = <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>, /* MCU NAVSS*/
8362306a36Sopenharmony_ci				 <0x00 0x40200000 0x00 0x40200000 0x00 0x00900100>, /* First peripheral window */
8462306a36Sopenharmony_ci				 <0x00 0x40f00000 0x00 0x40f00000 0x00 0x00020000>, /* CTRL_MMR0 */
8562306a36Sopenharmony_ci				 <0x00 0x41000000 0x00 0x41000000 0x00 0x00020000>, /* MCU R5F Core0 */
8662306a36Sopenharmony_ci				 <0x00 0x41400000 0x00 0x41400000 0x00 0x00020000>, /* MCU R5F Core1 */
8762306a36Sopenharmony_ci				 <0x00 0x41c00000 0x00 0x41c00000 0x00 0x00080000>, /* MCU SRAM */
8862306a36Sopenharmony_ci				 <0x00 0x42040000 0x00 0x42040000 0x00 0x03ac2400>, /* WKUP */
8962306a36Sopenharmony_ci				 <0x00 0x45100000 0x00 0x45100000 0x00 0x00c24000>, /* MMRs, remaining NAVSS */
9062306a36Sopenharmony_ci				 <0x00 0x46000000 0x00 0x46000000 0x00 0x00200000>, /* CPSW */
9162306a36Sopenharmony_ci				 <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>, /* OSPI space 1 */
9262306a36Sopenharmony_ci				 <0x00 0x50000000 0x00 0x50000000 0x00 0x8000000>, /*  FSS OSPI0 data region 1 */
9362306a36Sopenharmony_ci				 <0x05 0x00000000 0x05 0x00000000 0x01 0x0000000>, /* FSS OSPI0 data region 3*/
9462306a36Sopenharmony_ci				 <0x07 0x00000000 0x07 0x00000000 0x01 0x0000000>; /* FSS OSPI1 data region 3*/
9562306a36Sopenharmony_ci
9662306a36Sopenharmony_ci			cbass_wakeup: bus@42040000 {
9762306a36Sopenharmony_ci				compatible = "simple-bus";
9862306a36Sopenharmony_ci				#address-cells = <1>;
9962306a36Sopenharmony_ci				#size-cells = <1>;
10062306a36Sopenharmony_ci				/* WKUP  Basic peripherals */
10162306a36Sopenharmony_ci				ranges = <0x42040000 0x00 0x42040000 0x03ac2400>;
10262306a36Sopenharmony_ci			};
10362306a36Sopenharmony_ci		};
10462306a36Sopenharmony_ci	};
10562306a36Sopenharmony_ci};
10662306a36Sopenharmony_ci
10762306a36Sopenharmony_ci/* Now include the peripherals for each bus segments */
10862306a36Sopenharmony_ci#include "k3-am65-main.dtsi"
10962306a36Sopenharmony_ci#include "k3-am65-mcu.dtsi"
11062306a36Sopenharmony_ci#include "k3-am65-wakeup.dtsi"
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