162306a36Sopenharmony_ci// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Realtek RTD1295 SoC
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci * Copyright (c) 2016-2019 Andreas Färber
662306a36Sopenharmony_ci */
762306a36Sopenharmony_ci
862306a36Sopenharmony_ci#include "rtd129x.dtsi"
962306a36Sopenharmony_ci
1062306a36Sopenharmony_ci/ {
1162306a36Sopenharmony_ci	compatible = "realtek,rtd1295";
1262306a36Sopenharmony_ci
1362306a36Sopenharmony_ci	cpus {
1462306a36Sopenharmony_ci		#address-cells = <2>;
1562306a36Sopenharmony_ci		#size-cells = <0>;
1662306a36Sopenharmony_ci
1762306a36Sopenharmony_ci		cpu0: cpu@0 {
1862306a36Sopenharmony_ci			device_type = "cpu";
1962306a36Sopenharmony_ci			compatible = "arm,cortex-a53";
2062306a36Sopenharmony_ci			reg = <0x0 0x0>;
2162306a36Sopenharmony_ci			next-level-cache = <&l2>;
2262306a36Sopenharmony_ci		};
2362306a36Sopenharmony_ci
2462306a36Sopenharmony_ci		cpu1: cpu@1 {
2562306a36Sopenharmony_ci			device_type = "cpu";
2662306a36Sopenharmony_ci			compatible = "arm,cortex-a53";
2762306a36Sopenharmony_ci			reg = <0x0 0x1>;
2862306a36Sopenharmony_ci			next-level-cache = <&l2>;
2962306a36Sopenharmony_ci		};
3062306a36Sopenharmony_ci
3162306a36Sopenharmony_ci		cpu2: cpu@2 {
3262306a36Sopenharmony_ci			device_type = "cpu";
3362306a36Sopenharmony_ci			compatible = "arm,cortex-a53";
3462306a36Sopenharmony_ci			reg = <0x0 0x2>;
3562306a36Sopenharmony_ci			next-level-cache = <&l2>;
3662306a36Sopenharmony_ci		};
3762306a36Sopenharmony_ci
3862306a36Sopenharmony_ci		cpu3: cpu@3 {
3962306a36Sopenharmony_ci			device_type = "cpu";
4062306a36Sopenharmony_ci			compatible = "arm,cortex-a53";
4162306a36Sopenharmony_ci			reg = <0x0 0x3>;
4262306a36Sopenharmony_ci			next-level-cache = <&l2>;
4362306a36Sopenharmony_ci		};
4462306a36Sopenharmony_ci
4562306a36Sopenharmony_ci		l2: l2-cache {
4662306a36Sopenharmony_ci			compatible = "cache";
4762306a36Sopenharmony_ci			cache-level = <2>;
4862306a36Sopenharmony_ci			cache-unified;
4962306a36Sopenharmony_ci		};
5062306a36Sopenharmony_ci	};
5162306a36Sopenharmony_ci
5262306a36Sopenharmony_ci	timer {
5362306a36Sopenharmony_ci		compatible = "arm,armv8-timer";
5462306a36Sopenharmony_ci		interrupts = <GIC_PPI 13
5562306a36Sopenharmony_ci			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
5662306a36Sopenharmony_ci			     <GIC_PPI 14
5762306a36Sopenharmony_ci			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
5862306a36Sopenharmony_ci			     <GIC_PPI 11
5962306a36Sopenharmony_ci			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
6062306a36Sopenharmony_ci			     <GIC_PPI 10
6162306a36Sopenharmony_ci			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
6262306a36Sopenharmony_ci	};
6362306a36Sopenharmony_ci};
6462306a36Sopenharmony_ci
6562306a36Sopenharmony_ci&arm_pmu {
6662306a36Sopenharmony_ci	interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
6762306a36Sopenharmony_ci};
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