xref: /kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-wcd9385.dtsi

// SPDX-License-Identifier: BSD-3-Clause
/*
 * sc7280 device tree source for boards using Max98360 and wcd9385 codec
 *
 * Copyright (c) 2022, The Linux Foundation. All rights reserved.
 */

/ {
	/* BOARD-SPECIFIC TOP LEVEL NODES */
	sound: sound {
		compatible = "google,sc7280-herobrine";
		model = "sc7280-wcd938x-max98360a-1mic";

		audio-routing =
			"IN1_HPHL", "HPHL_OUT",
			"IN2_HPHR", "HPHR_OUT",
			"AMIC1", "MIC BIAS1",
			"AMIC2", "MIC BIAS2",
			"VA DMIC0", "MIC BIAS1",
			"VA DMIC1", "MIC BIAS1",
			"VA DMIC2", "MIC BIAS3",
			"VA DMIC3", "MIC BIAS3",
			"TX SWR_ADC0", "ADC1_OUTPUT",
			"TX SWR_ADC1", "ADC2_OUTPUT",
			"TX SWR_ADC2", "ADC3_OUTPUT",
			"TX SWR_DMIC0", "DMIC1_OUTPUT",
			"TX SWR_DMIC1", "DMIC2_OUTPUT",
			"TX SWR_DMIC2", "DMIC3_OUTPUT",
			"TX SWR_DMIC3", "DMIC4_OUTPUT",
			"TX SWR_DMIC4", "DMIC5_OUTPUT",
			"TX SWR_DMIC5", "DMIC6_OUTPUT",
			"TX SWR_DMIC6", "DMIC7_OUTPUT",
			"TX SWR_DMIC7", "DMIC8_OUTPUT";

		#address-cells = <1>;
		#size-cells = <0>;

		dai-link@0 {
			link-name = "MAX98360A";
			reg = <0>;

			cpu {
				sound-dai = <&lpass_cpu MI2S_SECONDARY>;
			};

			codec {
				sound-dai = <&max98360a>;
			};
		};

		dai-link@1 {
			link-name = "DisplayPort";
			reg = <1>;

			cpu {
				sound-dai = <&lpass_cpu LPASS_DP_RX>;
			};

			codec {
				sound-dai = <&mdss_dp>;
			};
		};

		dai-link@2 {
			link-name = "WCD9385 Playback";
			reg = <2>;

			cpu {
				sound-dai = <&lpass_cpu LPASS_CDC_DMA_RX0>;
			};

			codec {
				sound-dai = <&wcd9385 0>, <&swr0 0>, <&lpass_rx_macro 0>;
			};
		};

		dai-link@3 {
			link-name = "WCD9385 Capture";
			reg = <3>;

			cpu {
				sound-dai = <&lpass_cpu LPASS_CDC_DMA_TX3>;
			};

			codec {
				sound-dai = <&wcd9385 1>, <&swr1 0>, <&lpass_tx_macro 0>;
			};
		};

		dai-link@4 {
			link-name = "DMIC";
			reg = <4>;

			cpu {
				sound-dai = <&lpass_cpu LPASS_CDC_DMA_VA_TX0>;
			};

			codec {
				sound-dai = <&lpass_va_macro 0>;
			};
		};
	};
};

/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */

&lpass_cpu {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&mi2s1_data0>, <&mi2s1_sclk>, <&mi2s1_ws>;

	dai-link@1 {
		reg = <MI2S_SECONDARY>;
		qcom,playback-sd-lines = <0>;
	};

	dai-link@5 {
		reg = <LPASS_DP_RX>;
	};

	dai-link@6 {
		reg = <LPASS_CDC_DMA_RX0>;
	};

	dai-link@19 {
		reg = <LPASS_CDC_DMA_TX3>;
	};

	dai-link@25 {
		reg = <LPASS_CDC_DMA_VA_TX0>;
	};
};

&lpass_rx_macro {
	status = "okay";
};

&lpass_tx_macro {
	status = "okay";
};

&lpass_va_macro {
	status = "okay";
};

&swr0 {
	status = "okay";
};

&swr1 {
	status = "okay";
};

&wcd9385 {
	status = "okay";
};

/* PINCTRL */

&lpass_dmic01_clk {
	drive-strength = <8>;
	bias-disable;
};

&lpass_dmic01_data {
	bias-pull-down;
};

&lpass_dmic23_clk {
	drive-strength = <8>;
	bias-disable;
};

&lpass_dmic23_data {
	bias-pull-down;
};

&lpass_rx_swr_clk {
	drive-strength = <2>;
	slew-rate = <1>;
	bias-disable;
};

&lpass_rx_swr_data {
	drive-strength = <2>;
	slew-rate = <1>;
	bias-bus-hold;
};

&lpass_tx_swr_clk {
	drive-strength = <2>;
	slew-rate = <1>;
	bias-disable;
};

&lpass_tx_swr_data {
	drive-strength = <2>;
	slew-rate = <1>;
	bias-bus-hold;
};

&mi2s1_data0 {
	drive-strength = <6>;
	bias-disable;
};

&mi2s1_sclk {
	drive-strength = <6>;
	bias-disable;
};

&mi2s1_ws {
	drive-strength = <6>;
};