162306a36Sopenharmony_ci// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
262306a36Sopenharmony_ci// Copyright (C) 2020 Ondrej Jirman <megous@megous.com>
362306a36Sopenharmony_ci
462306a36Sopenharmony_ci/dts-v1/;
562306a36Sopenharmony_ci
662306a36Sopenharmony_ci#include "sun50i-a64-pinephone.dtsi"
762306a36Sopenharmony_ci
862306a36Sopenharmony_ci/ {
962306a36Sopenharmony_ci	model = "Pine64 PinePhone (1.2)";
1062306a36Sopenharmony_ci	compatible = "pine64,pinephone-1.2", "pine64,pinephone", "allwinner,sun50i-a64";
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_ci	wifi_pwrseq: wifi-pwrseq {
1362306a36Sopenharmony_ci		compatible = "mmc-pwrseq-simple";
1462306a36Sopenharmony_ci		reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
1562306a36Sopenharmony_ci	};
1662306a36Sopenharmony_ci};
1762306a36Sopenharmony_ci
1862306a36Sopenharmony_ci&backlight {
1962306a36Sopenharmony_ci	power-supply = <&reg_ldo_io0>;
2062306a36Sopenharmony_ci	/*
2162306a36Sopenharmony_ci	 * PWM backlight circuit on this PinePhone revision was changed since 1.0,
2262306a36Sopenharmony_ci	 * and the lowest PWM duty cycle that doesn't lead to backlight being off
2362306a36Sopenharmony_ci	 * is around 10%. Duty cycle for the lowest brightness level also varries
2462306a36Sopenharmony_ci	 * quite a bit between individual boards, so the lowest value here was
2562306a36Sopenharmony_ci	 * chosen as a safe default.
2662306a36Sopenharmony_ci	 */
2762306a36Sopenharmony_ci	brightness-levels = <
2862306a36Sopenharmony_ci		5000 5248 5506 5858 6345
2962306a36Sopenharmony_ci		6987 7805 8823 10062 11543
3062306a36Sopenharmony_ci		13287 15317 17654 20319 23336
3162306a36Sopenharmony_ci		26724 30505 34702 39335 44427
3262306a36Sopenharmony_ci		50000
3362306a36Sopenharmony_ci	>;
3462306a36Sopenharmony_ci	num-interpolated-steps = <50>;
3562306a36Sopenharmony_ci	default-brightness-level = <500>;
3662306a36Sopenharmony_ci};
3762306a36Sopenharmony_ci
3862306a36Sopenharmony_ci&lis3mdl {
3962306a36Sopenharmony_ci	/*
4062306a36Sopenharmony_ci	 * Board revision 1.2 fixed routing of the interrupt to DRDY pin,
4162306a36Sopenharmony_ci	 * enable interrupts.
4262306a36Sopenharmony_ci	 */
4362306a36Sopenharmony_ci	interrupt-parent = <&pio>;
4462306a36Sopenharmony_ci	interrupts = <1 1 IRQ_TYPE_EDGE_RISING>; /* PB1 */
4562306a36Sopenharmony_ci};
4662306a36Sopenharmony_ci
4762306a36Sopenharmony_ci&mmc1 {
4862306a36Sopenharmony_ci	mmc-pwrseq = <&wifi_pwrseq>;
4962306a36Sopenharmony_ci};
5062306a36Sopenharmony_ci
5162306a36Sopenharmony_ci&sgm3140 {
5262306a36Sopenharmony_ci	enable-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
5362306a36Sopenharmony_ci	flash-gpios = <&pio 2 3 GPIO_ACTIVE_HIGH>; /* PC3 */
5462306a36Sopenharmony_ci};
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