162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci *  linux/arch/arm/mm/copypage-v4wt.S
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci *  Copyright (C) 1995-1999 Russell King
662306a36Sopenharmony_ci *
762306a36Sopenharmony_ci *  This is for CPUs with a writethrough cache and 'flush ID cache' is
862306a36Sopenharmony_ci *  the only supported cache operation.
962306a36Sopenharmony_ci */
1062306a36Sopenharmony_ci#include <linux/init.h>
1162306a36Sopenharmony_ci#include <linux/highmem.h>
1262306a36Sopenharmony_ci
1362306a36Sopenharmony_ci/*
1462306a36Sopenharmony_ci * ARMv4 optimised copy_user_highpage
1562306a36Sopenharmony_ci *
1662306a36Sopenharmony_ci * Since we have writethrough caches, we don't have to worry about
1762306a36Sopenharmony_ci * dirty data in the cache.  However, we do have to ensure that
1862306a36Sopenharmony_ci * subsequent reads are up to date.
1962306a36Sopenharmony_ci */
2062306a36Sopenharmony_cistatic void v4wt_copy_user_page(void *kto, const void *kfrom)
2162306a36Sopenharmony_ci{
2262306a36Sopenharmony_ci	int tmp;
2362306a36Sopenharmony_ci
2462306a36Sopenharmony_ci	asm volatile ("\
2562306a36Sopenharmony_ci	.syntax unified\n\
2662306a36Sopenharmony_ci	ldmia	%1!, {r3, r4, ip, lr}		@ 4\n\
2762306a36Sopenharmony_ci1:	stmia	%0!, {r3, r4, ip, lr}		@ 4\n\
2862306a36Sopenharmony_ci	ldmia	%1!, {r3, r4, ip, lr}		@ 4+1\n\
2962306a36Sopenharmony_ci	stmia	%0!, {r3, r4, ip, lr}		@ 4\n\
3062306a36Sopenharmony_ci	ldmia	%1!, {r3, r4, ip, lr}		@ 4\n\
3162306a36Sopenharmony_ci	stmia	%0!, {r3, r4, ip, lr}		@ 4\n\
3262306a36Sopenharmony_ci	ldmia	%1!, {r3, r4, ip, lr}		@ 4\n\
3362306a36Sopenharmony_ci	subs	%2, %2, #1			@ 1\n\
3462306a36Sopenharmony_ci	stmia	%0!, {r3, r4, ip, lr}		@ 4\n\
3562306a36Sopenharmony_ci	ldmiane	%1!, {r3, r4, ip, lr}		@ 4\n\
3662306a36Sopenharmony_ci	bne	1b				@ 1\n\
3762306a36Sopenharmony_ci	mcr	p15, 0, %2, c7, c7, 0		@ flush ID cache"
3862306a36Sopenharmony_ci	: "+&r" (kto), "+&r" (kfrom), "=&r" (tmp)
3962306a36Sopenharmony_ci	: "2" (PAGE_SIZE / 64)
4062306a36Sopenharmony_ci	: "r3", "r4", "ip", "lr");
4162306a36Sopenharmony_ci}
4262306a36Sopenharmony_ci
4362306a36Sopenharmony_civoid v4wt_copy_user_highpage(struct page *to, struct page *from,
4462306a36Sopenharmony_ci	unsigned long vaddr, struct vm_area_struct *vma)
4562306a36Sopenharmony_ci{
4662306a36Sopenharmony_ci	void *kto, *kfrom;
4762306a36Sopenharmony_ci
4862306a36Sopenharmony_ci	kto = kmap_atomic(to);
4962306a36Sopenharmony_ci	kfrom = kmap_atomic(from);
5062306a36Sopenharmony_ci	v4wt_copy_user_page(kto, kfrom);
5162306a36Sopenharmony_ci	kunmap_atomic(kfrom);
5262306a36Sopenharmony_ci	kunmap_atomic(kto);
5362306a36Sopenharmony_ci}
5462306a36Sopenharmony_ci
5562306a36Sopenharmony_ci/*
5662306a36Sopenharmony_ci * ARMv4 optimised clear_user_page
5762306a36Sopenharmony_ci *
5862306a36Sopenharmony_ci * Same story as above.
5962306a36Sopenharmony_ci */
6062306a36Sopenharmony_civoid v4wt_clear_user_highpage(struct page *page, unsigned long vaddr)
6162306a36Sopenharmony_ci{
6262306a36Sopenharmony_ci	void *ptr, *kaddr = kmap_atomic(page);
6362306a36Sopenharmony_ci	asm volatile("\
6462306a36Sopenharmony_ci	mov	r1, %2				@ 1\n\
6562306a36Sopenharmony_ci	mov	r2, #0				@ 1\n\
6662306a36Sopenharmony_ci	mov	r3, #0				@ 1\n\
6762306a36Sopenharmony_ci	mov	ip, #0				@ 1\n\
6862306a36Sopenharmony_ci	mov	lr, #0				@ 1\n\
6962306a36Sopenharmony_ci1:	stmia	%0!, {r2, r3, ip, lr}		@ 4\n\
7062306a36Sopenharmony_ci	stmia	%0!, {r2, r3, ip, lr}		@ 4\n\
7162306a36Sopenharmony_ci	stmia	%0!, {r2, r3, ip, lr}		@ 4\n\
7262306a36Sopenharmony_ci	stmia	%0!, {r2, r3, ip, lr}		@ 4\n\
7362306a36Sopenharmony_ci	subs	r1, r1, #1			@ 1\n\
7462306a36Sopenharmony_ci	bne	1b				@ 1\n\
7562306a36Sopenharmony_ci	mcr	p15, 0, r2, c7, c7, 0		@ flush ID cache"
7662306a36Sopenharmony_ci	: "=r" (ptr)
7762306a36Sopenharmony_ci	: "0" (kaddr), "I" (PAGE_SIZE / 64)
7862306a36Sopenharmony_ci	: "r1", "r2", "r3", "ip", "lr");
7962306a36Sopenharmony_ci	kunmap_atomic(kaddr);
8062306a36Sopenharmony_ci}
8162306a36Sopenharmony_ci
8262306a36Sopenharmony_cistruct cpu_user_fns v4wt_user_fns __initdata = {
8362306a36Sopenharmony_ci	.cpu_clear_user_highpage = v4wt_clear_user_highpage,
8462306a36Sopenharmony_ci	.cpu_copy_user_highpage	= v4wt_copy_user_highpage,
8562306a36Sopenharmony_ci};
86