162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Created by:  Dave Martin, 2012-06-22
462306a36Sopenharmony_ci * Copyright:   (C) 2012-2013  Linaro Limited
562306a36Sopenharmony_ci */
662306a36Sopenharmony_ci
762306a36Sopenharmony_ci#include <linux/linkage.h>
862306a36Sopenharmony_ci
962306a36Sopenharmony_ci
1062306a36Sopenharmony_ciENTRY(dcscb_power_up_setup)
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_ci	cmp	r0, #0			@ check affinity level
1362306a36Sopenharmony_ci	beq	2f
1462306a36Sopenharmony_ci
1562306a36Sopenharmony_ci/*
1662306a36Sopenharmony_ci * Enable cluster-level coherency, in preparation for turning on the MMU.
1762306a36Sopenharmony_ci * The ACTLR SMP bit does not need to be set here, because cpu_resume()
1862306a36Sopenharmony_ci * already restores that.
1962306a36Sopenharmony_ci *
2062306a36Sopenharmony_ci * A15/A7 may not require explicit L2 invalidation on reset, dependent
2162306a36Sopenharmony_ci * on hardware integration decisions.
2262306a36Sopenharmony_ci * For now, this code assumes that L2 is either already invalidated,
2362306a36Sopenharmony_ci * or invalidation is not required.
2462306a36Sopenharmony_ci */
2562306a36Sopenharmony_ci
2662306a36Sopenharmony_ci	b	cci_enable_port_for_self
2762306a36Sopenharmony_ci
2862306a36Sopenharmony_ci2:	@ Implementation-specific local CPU setup operations should go here,
2962306a36Sopenharmony_ci	@ if any.  In this case, there is nothing to do.
3062306a36Sopenharmony_ci
3162306a36Sopenharmony_ci	bx	lr
3262306a36Sopenharmony_ci
3362306a36Sopenharmony_ciENDPROC(dcscb_power_up_setup)
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