162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-or-later */ 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Copyright 2012 Pavel Machek <pavel@denx.de> 462306a36Sopenharmony_ci * Copyright (C) 2012-2015 Altera Corporation 562306a36Sopenharmony_ci */ 662306a36Sopenharmony_ci 762306a36Sopenharmony_ci#ifndef __MACH_CORE_H 862306a36Sopenharmony_ci#define __MACH_CORE_H 962306a36Sopenharmony_ci 1062306a36Sopenharmony_ci#define SOCFPGA_RSTMGR_CTRL 0x04 1162306a36Sopenharmony_ci#define SOCFPGA_RSTMGR_MODMPURST 0x10 1262306a36Sopenharmony_ci#define SOCFPGA_RSTMGR_MODPERRST 0x14 1362306a36Sopenharmony_ci#define SOCFPGA_RSTMGR_BRGMODRST 0x1c 1462306a36Sopenharmony_ci 1562306a36Sopenharmony_ci#define SOCFPGA_A10_RSTMGR_CTRL 0xC 1662306a36Sopenharmony_ci#define SOCFPGA_A10_RSTMGR_MODMPURST 0x20 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ci/* System Manager bits */ 1962306a36Sopenharmony_ci#define RSTMGR_CTRL_SWCOLDRSTREQ 0x1 /* Cold Reset */ 2062306a36Sopenharmony_ci#define RSTMGR_CTRL_SWWARMRSTREQ 0x2 /* Warm Reset */ 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ci#define RSTMGR_MPUMODRST_CPU1 0x2 /* CPU1 Reset */ 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_civoid socfpga_init_l2_ecc(void); 2562306a36Sopenharmony_civoid socfpga_init_ocram_ecc(void); 2662306a36Sopenharmony_civoid socfpga_init_arria10_l2_ecc(void); 2762306a36Sopenharmony_civoid socfpga_init_arria10_ocram_ecc(void); 2862306a36Sopenharmony_ci 2962306a36Sopenharmony_ciextern void __iomem *sys_manager_base_addr; 3062306a36Sopenharmony_ciextern void __iomem *rst_manager_base_addr; 3162306a36Sopenharmony_ciextern void __iomem *sdr_ctl_base_addr; 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_ciu32 socfpga_sdram_self_refresh(u32 sdr_base); 3462306a36Sopenharmony_ciextern unsigned int socfpga_sdram_self_refresh_sz; 3562306a36Sopenharmony_ci 3662306a36Sopenharmony_ciextern char secondary_trampoline[], secondary_trampoline_end[]; 3762306a36Sopenharmony_ci 3862306a36Sopenharmony_ciextern unsigned long socfpga_cpu1start_addr; 3962306a36Sopenharmony_ci 4062306a36Sopenharmony_ci#define SOCFPGA_SCU_VIRT_BASE 0xfee00000 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_ci#endif 43