162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * SMP support for R-Mobile / SH-Mobile - sh73a0 portion
462306a36Sopenharmony_ci *
562306a36Sopenharmony_ci * Copyright (C) 2010  Magnus Damm
662306a36Sopenharmony_ci * Copyright (C) 2010  Takashi Yoshii
762306a36Sopenharmony_ci */
862306a36Sopenharmony_ci#include <linux/kernel.h>
962306a36Sopenharmony_ci#include <linux/init.h>
1062306a36Sopenharmony_ci#include <linux/smp.h>
1162306a36Sopenharmony_ci#include <linux/io.h>
1262306a36Sopenharmony_ci#include <linux/delay.h>
1362306a36Sopenharmony_ci
1462306a36Sopenharmony_ci#include <asm/smp_plat.h>
1562306a36Sopenharmony_ci
1662306a36Sopenharmony_ci#include "common.h"
1762306a36Sopenharmony_ci#include "sh73a0.h"
1862306a36Sopenharmony_ci
1962306a36Sopenharmony_ci#define CPG_BASE2	0xe6151000
2062306a36Sopenharmony_ci#define WUPCR		0x10	/* System-CPU Wake Up Control Register */
2162306a36Sopenharmony_ci#define SRESCR		0x18	/* System-CPU Software Reset Control Register */
2262306a36Sopenharmony_ci#define PSTR		0x40	/* System-CPU Power Status Register */
2362306a36Sopenharmony_ci
2462306a36Sopenharmony_ci#define SYSC_BASE	0xe6180000
2562306a36Sopenharmony_ci#define SBAR		0x20	/* SYS Boot Address Register */
2662306a36Sopenharmony_ci
2762306a36Sopenharmony_ci#define AP_BASE		0xe6f10000
2862306a36Sopenharmony_ci#define APARMBAREA	0x20	/* Address Translation Area Register */
2962306a36Sopenharmony_ci
3062306a36Sopenharmony_ci#define SH73A0_SCU_BASE 0xf0000000
3162306a36Sopenharmony_ci
3262306a36Sopenharmony_cistatic int sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle)
3362306a36Sopenharmony_ci{
3462306a36Sopenharmony_ci	unsigned int lcpu = cpu_logical_map(cpu);
3562306a36Sopenharmony_ci	void __iomem *cpg2 = ioremap(CPG_BASE2, PAGE_SIZE);
3662306a36Sopenharmony_ci
3762306a36Sopenharmony_ci	if (((readl(cpg2 + PSTR) >> (4 * lcpu)) & 3) == 3)
3862306a36Sopenharmony_ci		writel(1 << lcpu, cpg2 + WUPCR);	/* wake up */
3962306a36Sopenharmony_ci	else
4062306a36Sopenharmony_ci		writel(1 << lcpu, cpg2 + SRESCR);	/* reset */
4162306a36Sopenharmony_ci	iounmap(cpg2);
4262306a36Sopenharmony_ci	return 0;
4362306a36Sopenharmony_ci}
4462306a36Sopenharmony_ci
4562306a36Sopenharmony_cistatic void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)
4662306a36Sopenharmony_ci{
4762306a36Sopenharmony_ci	void __iomem *ap = ioremap(AP_BASE, PAGE_SIZE);
4862306a36Sopenharmony_ci	void __iomem *sysc = ioremap(SYSC_BASE, PAGE_SIZE);
4962306a36Sopenharmony_ci
5062306a36Sopenharmony_ci	/* Map the reset vector (in headsmp.S) */
5162306a36Sopenharmony_ci	writel(0, ap + APARMBAREA);      /* 4k */
5262306a36Sopenharmony_ci	writel(__pa(shmobile_boot_vector), sysc + SBAR);
5362306a36Sopenharmony_ci	iounmap(sysc);
5462306a36Sopenharmony_ci	iounmap(ap);
5562306a36Sopenharmony_ci
5662306a36Sopenharmony_ci	/* setup sh73a0 specific SCU bits */
5762306a36Sopenharmony_ci	shmobile_smp_scu_prepare_cpus(SH73A0_SCU_BASE, max_cpus);
5862306a36Sopenharmony_ci}
5962306a36Sopenharmony_ci
6062306a36Sopenharmony_ciconst struct smp_operations sh73a0_smp_ops __initconst = {
6162306a36Sopenharmony_ci	.smp_prepare_cpus	= sh73a0_smp_prepare_cpus,
6262306a36Sopenharmony_ci	.smp_boot_secondary	= sh73a0_boot_secondary,
6362306a36Sopenharmony_ci#ifdef CONFIG_HOTPLUG_CPU
6462306a36Sopenharmony_ci	.cpu_can_disable	= shmobile_smp_cpu_can_disable,
6562306a36Sopenharmony_ci	.cpu_die		= shmobile_smp_scu_cpu_die,
6662306a36Sopenharmony_ci	.cpu_kill		= shmobile_smp_scu_cpu_kill,
6762306a36Sopenharmony_ci#endif
6862306a36Sopenharmony_ci};
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