162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * R8A7740 processor support 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Copyright (C) 2011 Renesas Solutions Corp. 662306a36Sopenharmony_ci * Copyright (C) 2011 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> 762306a36Sopenharmony_ci */ 862306a36Sopenharmony_ci#include <linux/kernel.h> 962306a36Sopenharmony_ci#include <linux/init.h> 1062306a36Sopenharmony_ci#include <linux/io.h> 1162306a36Sopenharmony_ci#include <linux/irqchip.h> 1262306a36Sopenharmony_ci#include <linux/irqchip/arm-gic.h> 1362306a36Sopenharmony_ci 1462306a36Sopenharmony_ci#include <asm/mach/map.h> 1562306a36Sopenharmony_ci#include <asm/mach/arch.h> 1662306a36Sopenharmony_ci#include <asm/mach/time.h> 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ci#include "common.h" 1962306a36Sopenharmony_ci 2062306a36Sopenharmony_ci/* 2162306a36Sopenharmony_ci * r8a7740 chip has lasting errata on MERAM buffer. 2262306a36Sopenharmony_ci * this is work-around for it. 2362306a36Sopenharmony_ci * see 2462306a36Sopenharmony_ci * "Media RAM (MERAM)" on r8a7740 documentation 2562306a36Sopenharmony_ci */ 2662306a36Sopenharmony_ci#define MEBUFCNTR 0xFE950098 2762306a36Sopenharmony_cistatic void __init r8a7740_meram_workaround(void) 2862306a36Sopenharmony_ci{ 2962306a36Sopenharmony_ci void __iomem *reg; 3062306a36Sopenharmony_ci 3162306a36Sopenharmony_ci reg = ioremap(MEBUFCNTR, 4); 3262306a36Sopenharmony_ci if (reg) { 3362306a36Sopenharmony_ci iowrite32(0x01600164, reg); 3462306a36Sopenharmony_ci iounmap(reg); 3562306a36Sopenharmony_ci } 3662306a36Sopenharmony_ci} 3762306a36Sopenharmony_ci 3862306a36Sopenharmony_cistatic void __init r8a7740_init_irq_of(void) 3962306a36Sopenharmony_ci{ 4062306a36Sopenharmony_ci void __iomem *intc_prio_base = ioremap(0xe6900010, 0x10); 4162306a36Sopenharmony_ci void __iomem *intc_msk_base = ioremap(0xe6900040, 0x10); 4262306a36Sopenharmony_ci void __iomem *pfc_inta_ctrl = ioremap(0xe605807c, 0x4); 4362306a36Sopenharmony_ci 4462306a36Sopenharmony_ci irqchip_init(); 4562306a36Sopenharmony_ci 4662306a36Sopenharmony_ci /* route signals to GIC */ 4762306a36Sopenharmony_ci iowrite32(0x0, pfc_inta_ctrl); 4862306a36Sopenharmony_ci 4962306a36Sopenharmony_ci /* 5062306a36Sopenharmony_ci * To mask the shared interrupt to SPI 149 we must ensure to set 5162306a36Sopenharmony_ci * PRIO *and* MASK. Else we run into IRQ floods when registering 5262306a36Sopenharmony_ci * the intc_irqpin devices 5362306a36Sopenharmony_ci */ 5462306a36Sopenharmony_ci iowrite32(0x0, intc_prio_base + 0x0); 5562306a36Sopenharmony_ci iowrite32(0x0, intc_prio_base + 0x4); 5662306a36Sopenharmony_ci iowrite32(0x0, intc_prio_base + 0x8); 5762306a36Sopenharmony_ci iowrite32(0x0, intc_prio_base + 0xc); 5862306a36Sopenharmony_ci iowrite8(0xff, intc_msk_base + 0x0); 5962306a36Sopenharmony_ci iowrite8(0xff, intc_msk_base + 0x4); 6062306a36Sopenharmony_ci iowrite8(0xff, intc_msk_base + 0x8); 6162306a36Sopenharmony_ci iowrite8(0xff, intc_msk_base + 0xc); 6262306a36Sopenharmony_ci 6362306a36Sopenharmony_ci iounmap(intc_prio_base); 6462306a36Sopenharmony_ci iounmap(intc_msk_base); 6562306a36Sopenharmony_ci iounmap(pfc_inta_ctrl); 6662306a36Sopenharmony_ci} 6762306a36Sopenharmony_ci 6862306a36Sopenharmony_cistatic void __init r8a7740_generic_init(void) 6962306a36Sopenharmony_ci{ 7062306a36Sopenharmony_ci r8a7740_meram_workaround(); 7162306a36Sopenharmony_ci} 7262306a36Sopenharmony_ci 7362306a36Sopenharmony_cistatic const char *const r8a7740_boards_compat_dt[] __initconst = { 7462306a36Sopenharmony_ci "renesas,r8a7740", 7562306a36Sopenharmony_ci NULL 7662306a36Sopenharmony_ci}; 7762306a36Sopenharmony_ci 7862306a36Sopenharmony_ciDT_MACHINE_START(R8A7740_DT, "Generic R8A7740 (Flattened Device Tree)") 7962306a36Sopenharmony_ci .l2c_aux_val = 0, 8062306a36Sopenharmony_ci .l2c_aux_mask = ~0, 8162306a36Sopenharmony_ci .init_early = shmobile_init_delay, 8262306a36Sopenharmony_ci .init_irq = r8a7740_init_irq_of, 8362306a36Sopenharmony_ci .init_machine = r8a7740_generic_init, 8462306a36Sopenharmony_ci .init_late = shmobile_init_late, 8562306a36Sopenharmony_ci .dt_compat = r8a7740_boards_compat_dt, 8662306a36Sopenharmony_ciMACHINE_END 87