162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 262306a36Sopenharmony_ci/* linux/arch/arm/plat-s3c64xx/sleep.S 362306a36Sopenharmony_ci * 462306a36Sopenharmony_ci * Copyright 2008 Openmoko, Inc. 562306a36Sopenharmony_ci * Copyright 2008 Simtec Electronics 662306a36Sopenharmony_ci * Ben Dooks <ben@simtec.co.uk> 762306a36Sopenharmony_ci * http://armlinux.simtec.co.uk/ 862306a36Sopenharmony_ci * 962306a36Sopenharmony_ci * S3C64XX CPU sleep code 1062306a36Sopenharmony_ci */ 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ci#include <linux/linkage.h> 1362306a36Sopenharmony_ci#include <asm/assembler.h> 1462306a36Sopenharmony_ci#include "map.h" 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_ci#undef S3C64XX_VA_GPIO 1762306a36Sopenharmony_ci#define S3C64XX_VA_GPIO (0x0) 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ci#include "regs-gpio.h" 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_ci#define LL_UART (S3C_PA_UART + (0x400 * CONFIG_S3C_LOWLEVEL_UART_PORT)) 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_ci .text 2462306a36Sopenharmony_ci 2562306a36Sopenharmony_ci /* Sleep magic, the word before the resume entry point so that the 2662306a36Sopenharmony_ci * bootloader can check for a resumeable image. */ 2762306a36Sopenharmony_ci 2862306a36Sopenharmony_ci .word 0x2bedf00d 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ci /* s3c_cpu_reusme 3162306a36Sopenharmony_ci * 3262306a36Sopenharmony_ci * This is the entry point, stored by whatever method the bootloader 3362306a36Sopenharmony_ci * requires to get the kernel runnign again. This code expects to be 3462306a36Sopenharmony_ci * entered with no caches live and the MMU disabled. It will then 3562306a36Sopenharmony_ci * restore the MMU and other basic CP registers saved and restart 3662306a36Sopenharmony_ci * the kernel C code to finish the resume code. 3762306a36Sopenharmony_ci */ 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_ciENTRY(s3c_cpu_resume) 4062306a36Sopenharmony_ci msr cpsr_c, #PSR_I_BIT | PSR_F_BIT | SVC_MODE 4162306a36Sopenharmony_ci ldr r2, =LL_UART /* for debug */ 4262306a36Sopenharmony_ci b cpu_resume 43