162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Copyright (c) 2011 Samsung Electronics Co., Ltd. 462306a36Sopenharmony_ci * http://www.samsung.com 562306a36Sopenharmony_ci * 662306a36Sopenharmony_ci * Copyright 2008 Openmoko, Inc. 762306a36Sopenharmony_ci * Copyright 2008 Simtec Electronics 862306a36Sopenharmony_ci * Ben Dooks <ben@simtec.co.uk> 962306a36Sopenharmony_ci * http://armlinux.simtec.co.uk/ 1062306a36Sopenharmony_ci * 1162306a36Sopenharmony_ci * Common Header for S3C64XX machines 1262306a36Sopenharmony_ci */ 1362306a36Sopenharmony_ci 1462306a36Sopenharmony_ci#ifndef __ARCH_ARM_MACH_S3C64XX_COMMON_H 1562306a36Sopenharmony_ci#define __ARCH_ARM_MACH_S3C64XX_COMMON_H 1662306a36Sopenharmony_ci 1762306a36Sopenharmony_ci#include <linux/reboot.h> 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_civoid s3c64xx_init_irq(u32 vic0, u32 vic1); 2062306a36Sopenharmony_civoid s3c64xx_init_io(struct map_desc *mach_desc, int size); 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_cistruct device_node; 2362306a36Sopenharmony_civoid s3c64xx_set_xtal_freq(unsigned long freq); 2462306a36Sopenharmony_civoid s3c64xx_set_xusbxti_freq(unsigned long freq); 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ci#ifdef CONFIG_CPU_S3C6400 2762306a36Sopenharmony_ci 2862306a36Sopenharmony_ciextern int s3c6400_init(void); 2962306a36Sopenharmony_ciextern void s3c6400_init_irq(void); 3062306a36Sopenharmony_ciextern void s3c6400_map_io(void); 3162306a36Sopenharmony_ci 3262306a36Sopenharmony_ci#else 3362306a36Sopenharmony_ci#define s3c6400_map_io NULL 3462306a36Sopenharmony_ci#define s3c6400_init NULL 3562306a36Sopenharmony_ci#endif 3662306a36Sopenharmony_ci 3762306a36Sopenharmony_ci#ifdef CONFIG_CPU_S3C6410 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_ciextern int s3c6410_init(void); 4062306a36Sopenharmony_ciextern void s3c6410_init_irq(void); 4162306a36Sopenharmony_ciextern void s3c6410_map_io(void); 4262306a36Sopenharmony_ci 4362306a36Sopenharmony_ci#else 4462306a36Sopenharmony_ci#define s3c6410_map_io NULL 4562306a36Sopenharmony_ci#define s3c6410_init NULL 4662306a36Sopenharmony_ci#endif 4762306a36Sopenharmony_ci 4862306a36Sopenharmony_ci#ifdef CONFIG_S3C64XX_PL080 4962306a36Sopenharmony_ciextern struct pl08x_platform_data s3c64xx_dma0_plat_data; 5062306a36Sopenharmony_ciextern struct pl08x_platform_data s3c64xx_dma1_plat_data; 5162306a36Sopenharmony_ci#endif 5262306a36Sopenharmony_ci 5362306a36Sopenharmony_ci/* Samsung HR-Timer Clock mode */ 5462306a36Sopenharmony_cienum s3c64xx_timer_mode { 5562306a36Sopenharmony_ci S3C64XX_PWM0, 5662306a36Sopenharmony_ci S3C64XX_PWM1, 5762306a36Sopenharmony_ci S3C64XX_PWM2, 5862306a36Sopenharmony_ci S3C64XX_PWM3, 5962306a36Sopenharmony_ci S3C64XX_PWM4, 6062306a36Sopenharmony_ci}; 6162306a36Sopenharmony_ci 6262306a36Sopenharmony_ciextern void __init s3c64xx_set_timer_source(enum s3c64xx_timer_mode event, 6362306a36Sopenharmony_ci enum s3c64xx_timer_mode source); 6462306a36Sopenharmony_ciextern void __init s3c64xx_timer_init(void); 6562306a36Sopenharmony_ci 6662306a36Sopenharmony_ci#endif /* __ARCH_ARM_MACH_S3C64XX_COMMON_H */ 67