162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Copyright 2008 Openmoko, Inc. 462306a36Sopenharmony_ci * Copyright 2008 Simtec Electronics 562306a36Sopenharmony_ci * Ben Dooks <ben@simtec.co.uk> 662306a36Sopenharmony_ci * http://armlinux.simtec.co.uk/ 762306a36Sopenharmony_ci * 862306a36Sopenharmony_ci * S3C64XX - PM core support for arch/arm/plat-s3c/pm.c 962306a36Sopenharmony_ci */ 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_ci#ifndef __MACH_S3C64XX_PM_CORE_H 1262306a36Sopenharmony_ci#define __MACH_S3C64XX_PM_CORE_H __FILE__ 1362306a36Sopenharmony_ci 1462306a36Sopenharmony_ci#include <linux/serial_s3c.h> 1562306a36Sopenharmony_ci#include <linux/delay.h> 1662306a36Sopenharmony_ci 1762306a36Sopenharmony_ci#include "regs-gpio.h" 1862306a36Sopenharmony_ci#include "regs-clock.h" 1962306a36Sopenharmony_ci#include "map.h" 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_cistatic inline void s3c_pm_debug_init_uart(void) 2262306a36Sopenharmony_ci{ 2362306a36Sopenharmony_ci} 2462306a36Sopenharmony_ci 2562306a36Sopenharmony_cistatic inline void s3c_pm_arch_prepare_irqs(void) 2662306a36Sopenharmony_ci{ 2762306a36Sopenharmony_ci /* VIC should have already been taken care of */ 2862306a36Sopenharmony_ci 2962306a36Sopenharmony_ci /* clear any pending EINT0 interrupts */ 3062306a36Sopenharmony_ci __raw_writel(__raw_readl(S3C64XX_EINT0PEND), S3C64XX_EINT0PEND); 3162306a36Sopenharmony_ci} 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_cistatic inline void s3c_pm_arch_stop_clocks(void) 3462306a36Sopenharmony_ci{ 3562306a36Sopenharmony_ci} 3662306a36Sopenharmony_ci 3762306a36Sopenharmony_cistatic inline void s3c_pm_arch_show_resume_irqs(void) 3862306a36Sopenharmony_ci{ 3962306a36Sopenharmony_ci} 4062306a36Sopenharmony_ci 4162306a36Sopenharmony_ci/* make these defines, we currently do not have any need to change 4262306a36Sopenharmony_ci * the IRQ wake controls depending on the CPU we are running on */ 4362306a36Sopenharmony_ci#ifdef CONFIG_PM_SLEEP 4462306a36Sopenharmony_ci#define s3c_irqwake_eintallow ((1 << 28) - 1) 4562306a36Sopenharmony_ci#define s3c_irqwake_intallow (~0) 4662306a36Sopenharmony_ci#else 4762306a36Sopenharmony_ci#define s3c_irqwake_eintallow 0 4862306a36Sopenharmony_ci#define s3c_irqwake_intallow 0 4962306a36Sopenharmony_ci#endif 5062306a36Sopenharmony_ci 5162306a36Sopenharmony_cistatic inline void s3c_pm_restored_gpios(void) 5262306a36Sopenharmony_ci{ 5362306a36Sopenharmony_ci /* ensure sleep mode has been cleared from the system */ 5462306a36Sopenharmony_ci 5562306a36Sopenharmony_ci __raw_writel(0, S3C64XX_SLPEN); 5662306a36Sopenharmony_ci} 5762306a36Sopenharmony_ci 5862306a36Sopenharmony_cistatic inline void samsung_pm_saved_gpios(void) 5962306a36Sopenharmony_ci{ 6062306a36Sopenharmony_ci /* turn on the sleep mode and keep it there, as it seems that during 6162306a36Sopenharmony_ci * suspend the xCON registers get re-set and thus you can end up with 6262306a36Sopenharmony_ci * problems between going to sleep and resuming. 6362306a36Sopenharmony_ci */ 6462306a36Sopenharmony_ci 6562306a36Sopenharmony_ci __raw_writel(S3C64XX_SLPEN_USE_xSLP, S3C64XX_SLPEN); 6662306a36Sopenharmony_ci} 6762306a36Sopenharmony_ci#endif /* __MACH_S3C64XX_PM_CORE_H */ 68