162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * Copyright (c) 2008 Simtec Electronics 462306a36Sopenharmony_ci * Ben Dooks <ben@simtec.co.uk> 562306a36Sopenharmony_ci * 662306a36Sopenharmony_ci * S3C24XX - Memory map definitions 762306a36Sopenharmony_ci */ 862306a36Sopenharmony_ci 962306a36Sopenharmony_ci#ifndef __ASM_PLAT_MAP_S3C_H 1062306a36Sopenharmony_ci#define __ASM_PLAT_MAP_S3C_H __FILE__ 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ci#include "map.h" 1362306a36Sopenharmony_ci 1462306a36Sopenharmony_ci/* 1562306a36Sopenharmony_ci * GPIO ports 1662306a36Sopenharmony_ci * 1762306a36Sopenharmony_ci * the calculation for the VA of this must ensure that 1862306a36Sopenharmony_ci * it is the same distance apart from the UART in the 1962306a36Sopenharmony_ci * phsyical address space, as the initial mapping for the IO 2062306a36Sopenharmony_ci * is done as a 1:1 mapping. This puts it (currently) at 2162306a36Sopenharmony_ci * 0xFA800000, which is not in the way of any current mapping 2262306a36Sopenharmony_ci * by the base system. 2362306a36Sopenharmony_ci*/ 2462306a36Sopenharmony_ci#define S3C64XX_VA_GPIO S3C_ADDR_CPU(0x00000000) 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ci#define S3C64XX_VA_MODEM S3C_ADDR_CPU(0x00100000) 2762306a36Sopenharmony_ci#define S3C64XX_VA_USB_HSPHY S3C_ADDR_CPU(0x00200000) 2862306a36Sopenharmony_ci 2962306a36Sopenharmony_ci#define S3C_VA_USB_HSPHY S3C64XX_VA_USB_HSPHY 3062306a36Sopenharmony_ci 3162306a36Sopenharmony_ci#include "map-s5p.h" 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_ci#endif /* __ASM_PLAT_MAP_S3C_H */ 34