162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */ 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * arch/arm/mach-rpc/include/mach/hardware.h 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Copyright (C) 1996-1999 Russell King. 662306a36Sopenharmony_ci * 762306a36Sopenharmony_ci * This file contains the hardware definitions of the RiscPC series machines. 862306a36Sopenharmony_ci */ 962306a36Sopenharmony_ci#ifndef __ASM_ARCH_HARDWARE_H 1062306a36Sopenharmony_ci#define __ASM_ARCH_HARDWARE_H 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ci#include <mach/memory.h> 1362306a36Sopenharmony_ci 1462306a36Sopenharmony_ci/* 1562306a36Sopenharmony_ci * What hardware must be present 1662306a36Sopenharmony_ci */ 1762306a36Sopenharmony_ci#define HAS_IOMD 1862306a36Sopenharmony_ci#define HAS_VIDC20 1962306a36Sopenharmony_ci 2062306a36Sopenharmony_ci/* Hardware addresses of major areas. 2162306a36Sopenharmony_ci * *_START is the physical address 2262306a36Sopenharmony_ci * *_SIZE is the size of the region 2362306a36Sopenharmony_ci * *_BASE is the virtual address 2462306a36Sopenharmony_ci */ 2562306a36Sopenharmony_ci#define RPC_RAM_SIZE 0x10000000 2662306a36Sopenharmony_ci#define RPC_RAM_START 0x10000000 2762306a36Sopenharmony_ci 2862306a36Sopenharmony_ci#define EASI_SIZE 0x08000000 /* EASI I/O */ 2962306a36Sopenharmony_ci#define EASI_START 0x08000000 3062306a36Sopenharmony_ci#define EASI_BASE IOMEM(0xe5000000) 3162306a36Sopenharmony_ci 3262306a36Sopenharmony_ci#define IO_START 0x03000000 /* I/O */ 3362306a36Sopenharmony_ci#define IO_SIZE 0x01000000 3462306a36Sopenharmony_ci#define IO_BASE IOMEM(0xe0000000) 3562306a36Sopenharmony_ci 3662306a36Sopenharmony_ci#define SCREEN_START 0x02000000 /* VRAM */ 3762306a36Sopenharmony_ci#define SCREEN_END 0xdfc00000 3862306a36Sopenharmony_ci#define SCREEN_BASE 0xdf800000 3962306a36Sopenharmony_ci 4062306a36Sopenharmony_ci#define UNCACHEABLE_ADDR (FLUSH_BASE + 0x10000) 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_ci/* 4362306a36Sopenharmony_ci * IO Addresses 4462306a36Sopenharmony_ci */ 4562306a36Sopenharmony_ci#define ECARD_EASI_BASE (EASI_BASE) 4662306a36Sopenharmony_ci#define VIDC_BASE (IO_BASE + 0x00400000) 4762306a36Sopenharmony_ci#define EXPMASK_BASE (IO_BASE + 0x00360000) 4862306a36Sopenharmony_ci#define ECARD_IOC4_BASE (IO_BASE + 0x00270000) 4962306a36Sopenharmony_ci#define ECARD_IOC_BASE (IO_BASE + 0x00240000) 5062306a36Sopenharmony_ci#define IOMD_BASE (IO_BASE + 0x00200000) 5162306a36Sopenharmony_ci#define IOC_BASE (IO_BASE + 0x00200000) 5262306a36Sopenharmony_ci#define ECARD_MEMC8_BASE (IO_BASE + 0x0002b000) 5362306a36Sopenharmony_ci#define FLOPPYDMA_BASE (IO_BASE + 0x0002a000) 5462306a36Sopenharmony_ci#define PCIO_BASE (IO_BASE + 0x00010000) 5562306a36Sopenharmony_ci#define ECARD_MEMC_BASE (IO_BASE + 0x00000000) 5662306a36Sopenharmony_ci 5762306a36Sopenharmony_ci#define vidc_writel(val) __raw_writel(val, VIDC_BASE) 5862306a36Sopenharmony_ci 5962306a36Sopenharmony_ci#define NETSLOT_BASE 0x0302b000 6062306a36Sopenharmony_ci#define NETSLOT_SIZE 0x00001000 6162306a36Sopenharmony_ci 6262306a36Sopenharmony_ci#define PODSLOT_IOC0_BASE 0x03240000 6362306a36Sopenharmony_ci#define PODSLOT_IOC4_BASE 0x03270000 6462306a36Sopenharmony_ci#define PODSLOT_IOC_SIZE (1 << 14) 6562306a36Sopenharmony_ci#define PODSLOT_MEMC_BASE 0x03000000 6662306a36Sopenharmony_ci#define PODSLOT_MEMC_SIZE (1 << 14) 6762306a36Sopenharmony_ci#define PODSLOT_EASI_BASE 0x08000000 6862306a36Sopenharmony_ci#define PODSLOT_EASI_SIZE (1 << 24) 6962306a36Sopenharmony_ci 7062306a36Sopenharmony_ci#define EXPMASK_STATUS (EXPMASK_BASE + 0x00) 7162306a36Sopenharmony_ci#define EXPMASK_ENABLE (EXPMASK_BASE + 0x04) 7262306a36Sopenharmony_ci 7362306a36Sopenharmony_ci#endif 74