162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */
262306a36Sopenharmony_ci/*
362306a36Sopenharmony_ci * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
462306a36Sopenharmony_ci * Author: Tony Xie <tony.xie@rock-chips.com>
562306a36Sopenharmony_ci */
662306a36Sopenharmony_ci
762306a36Sopenharmony_ci#ifndef __MACH_ROCKCHIP_PM_H
862306a36Sopenharmony_ci#define __MACH_ROCKCHIP_PM_H
962306a36Sopenharmony_ci
1062306a36Sopenharmony_ciextern unsigned long rkpm_bootdata_cpusp;
1162306a36Sopenharmony_ciextern unsigned long rkpm_bootdata_cpu_code;
1262306a36Sopenharmony_ciextern unsigned long rkpm_bootdata_l2ctlr_f;
1362306a36Sopenharmony_ciextern unsigned long rkpm_bootdata_l2ctlr;
1462306a36Sopenharmony_ciextern unsigned long rkpm_bootdata_ddr_code;
1562306a36Sopenharmony_ciextern unsigned long rkpm_bootdata_ddr_data;
1662306a36Sopenharmony_ciextern unsigned long rk3288_bootram_sz;
1762306a36Sopenharmony_ci
1862306a36Sopenharmony_civoid rockchip_slp_cpu_resume(void);
1962306a36Sopenharmony_ci#ifdef CONFIG_PM_SLEEP
2062306a36Sopenharmony_civoid __init rockchip_suspend_init(void);
2162306a36Sopenharmony_ci#else
2262306a36Sopenharmony_cistatic inline void rockchip_suspend_init(void)
2362306a36Sopenharmony_ci{
2462306a36Sopenharmony_ci}
2562306a36Sopenharmony_ci#endif
2662306a36Sopenharmony_ci
2762306a36Sopenharmony_ci/****** following is rk3288 defined **********/
2862306a36Sopenharmony_ci#define RK3288_PMU_WAKEUP_CFG0		0x00
2962306a36Sopenharmony_ci#define RK3288_PMU_WAKEUP_CFG1		0x04
3062306a36Sopenharmony_ci#define RK3288_PMU_PWRMODE_CON		0x18
3162306a36Sopenharmony_ci#define RK3288_PMU_OSC_CNT		0x20
3262306a36Sopenharmony_ci#define RK3288_PMU_PLL_CNT		0x24
3362306a36Sopenharmony_ci#define RK3288_PMU_STABL_CNT		0x28
3462306a36Sopenharmony_ci#define RK3288_PMU_DDR0IO_PWRON_CNT	0x2c
3562306a36Sopenharmony_ci#define RK3288_PMU_DDR1IO_PWRON_CNT	0x30
3662306a36Sopenharmony_ci#define RK3288_PMU_CORE_PWRDWN_CNT	0x34
3762306a36Sopenharmony_ci#define RK3288_PMU_CORE_PWRUP_CNT	0x38
3862306a36Sopenharmony_ci#define RK3288_PMU_GPU_PWRDWN_CNT	0x3c
3962306a36Sopenharmony_ci#define RK3288_PMU_GPU_PWRUP_CNT	0x40
4062306a36Sopenharmony_ci#define RK3288_PMU_WAKEUP_RST_CLR_CNT	0x44
4162306a36Sopenharmony_ci#define RK3288_PMU_PWRMODE_CON1		0x90
4262306a36Sopenharmony_ci
4362306a36Sopenharmony_ci#define RK3288_SGRF_SOC_CON0		(0x0000)
4462306a36Sopenharmony_ci#define RK3288_SGRF_FAST_BOOT_ADDR	(0x0120)
4562306a36Sopenharmony_ci#define SGRF_PCLK_WDT_GATE		BIT(6)
4662306a36Sopenharmony_ci#define SGRF_PCLK_WDT_GATE_WRITE	BIT(22)
4762306a36Sopenharmony_ci#define SGRF_FAST_BOOT_EN		BIT(8)
4862306a36Sopenharmony_ci#define SGRF_FAST_BOOT_EN_WRITE		BIT(24)
4962306a36Sopenharmony_ci
5062306a36Sopenharmony_ci#define RK3288_SGRF_CPU_CON0		(0x40)
5162306a36Sopenharmony_ci#define SGRF_DAPDEVICEEN		BIT(0)
5262306a36Sopenharmony_ci#define SGRF_DAPDEVICEEN_WRITE		BIT(16)
5362306a36Sopenharmony_ci
5462306a36Sopenharmony_ci/* PMU_WAKEUP_CFG1 bits */
5562306a36Sopenharmony_ci#define PMU_ARMINT_WAKEUP_EN		BIT(0)
5662306a36Sopenharmony_ci#define PMU_GPIOINT_WAKEUP_EN		BIT(3)
5762306a36Sopenharmony_ci
5862306a36Sopenharmony_cienum rk3288_pwr_mode_con {
5962306a36Sopenharmony_ci	PMU_PWR_MODE_EN = 0,
6062306a36Sopenharmony_ci	PMU_CLK_CORE_SRC_GATE_EN,
6162306a36Sopenharmony_ci	PMU_GLOBAL_INT_DISABLE,
6262306a36Sopenharmony_ci	PMU_L2FLUSH_EN,
6362306a36Sopenharmony_ci	PMU_BUS_PD_EN,
6462306a36Sopenharmony_ci	PMU_A12_0_PD_EN,
6562306a36Sopenharmony_ci	PMU_SCU_EN,
6662306a36Sopenharmony_ci	PMU_PLL_PD_EN,
6762306a36Sopenharmony_ci	PMU_CHIP_PD_EN, /* POWER OFF PIN ENABLE */
6862306a36Sopenharmony_ci	PMU_PWROFF_COMB,
6962306a36Sopenharmony_ci	PMU_ALIVE_USE_LF,
7062306a36Sopenharmony_ci	PMU_PMU_USE_LF,
7162306a36Sopenharmony_ci	PMU_OSC_24M_DIS,
7262306a36Sopenharmony_ci	PMU_INPUT_CLAMP_EN,
7362306a36Sopenharmony_ci	PMU_WAKEUP_RESET_EN,
7462306a36Sopenharmony_ci	PMU_SREF0_ENTER_EN,
7562306a36Sopenharmony_ci	PMU_SREF1_ENTER_EN,
7662306a36Sopenharmony_ci	PMU_DDR0IO_RET_EN,
7762306a36Sopenharmony_ci	PMU_DDR1IO_RET_EN,
7862306a36Sopenharmony_ci	PMU_DDR0_GATING_EN,
7962306a36Sopenharmony_ci	PMU_DDR1_GATING_EN,
8062306a36Sopenharmony_ci	PMU_DDR0IO_RET_DE_REQ,
8162306a36Sopenharmony_ci	PMU_DDR1IO_RET_DE_REQ
8262306a36Sopenharmony_ci};
8362306a36Sopenharmony_ci
8462306a36Sopenharmony_cienum rk3288_pwr_mode_con1 {
8562306a36Sopenharmony_ci	PMU_CLR_BUS = 0,
8662306a36Sopenharmony_ci	PMU_CLR_CORE,
8762306a36Sopenharmony_ci	PMU_CLR_CPUP,
8862306a36Sopenharmony_ci	PMU_CLR_ALIVE,
8962306a36Sopenharmony_ci	PMU_CLR_DMA,
9062306a36Sopenharmony_ci	PMU_CLR_PERI,
9162306a36Sopenharmony_ci	PMU_CLR_GPU,
9262306a36Sopenharmony_ci	PMU_CLR_VIDEO,
9362306a36Sopenharmony_ci	PMU_CLR_HEVC,
9462306a36Sopenharmony_ci	PMU_CLR_VIO,
9562306a36Sopenharmony_ci};
9662306a36Sopenharmony_ci
9762306a36Sopenharmony_ci#endif /* __MACH_ROCKCHIP_PM_H */
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