162306a36Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */ 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * OMAP3/4 Voltage Controller (VC) structure and macro definitions 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Copyright (C) 2007, 2010 Texas Instruments, Inc. 662306a36Sopenharmony_ci * Rajendra Nayak <rnayak@ti.com> 762306a36Sopenharmony_ci * Lesly A M <x0080970@ti.com> 862306a36Sopenharmony_ci * Thara Gopinath <thara@ti.com> 962306a36Sopenharmony_ci * 1062306a36Sopenharmony_ci * Copyright (C) 2008, 2011 Nokia Corporation 1162306a36Sopenharmony_ci * Kalle Jokiniemi 1262306a36Sopenharmony_ci * Paul Walmsley 1362306a36Sopenharmony_ci */ 1462306a36Sopenharmony_ci#ifndef __ARCH_ARM_MACH_OMAP2_VC_H 1562306a36Sopenharmony_ci#define __ARCH_ARM_MACH_OMAP2_VC_H 1662306a36Sopenharmony_ci 1762306a36Sopenharmony_ci#include <linux/kernel.h> 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_cistruct voltagedomain; 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_ci/** 2262306a36Sopenharmony_ci * struct omap_vc_common - per-VC register/bitfield data 2362306a36Sopenharmony_ci * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register 2462306a36Sopenharmony_ci * @valid: VALID bitmask in PRM_VC_BYPASS_VAL register 2562306a36Sopenharmony_ci * @bypass_val_reg: Offset of PRM_VC_BYPASS_VAL reg from PRM start 2662306a36Sopenharmony_ci * @data_shift: DATA field shift in PRM_VC_BYPASS_VAL register 2762306a36Sopenharmony_ci * @slaveaddr_shift: SLAVEADDR field shift in PRM_VC_BYPASS_VAL register 2862306a36Sopenharmony_ci * @regaddr_shift: REGADDR field shift in PRM_VC_BYPASS_VAL register 2962306a36Sopenharmony_ci * @cmd_on_shift: ON field shift in PRM_VC_CMD_VAL_* register 3062306a36Sopenharmony_ci * @cmd_onlp_shift: ONLP field shift in PRM_VC_CMD_VAL_* register 3162306a36Sopenharmony_ci * @cmd_ret_shift: RET field shift in PRM_VC_CMD_VAL_* register 3262306a36Sopenharmony_ci * @cmd_off_shift: OFF field shift in PRM_VC_CMD_VAL_* register 3362306a36Sopenharmony_ci * @i2c_cfg_reg: I2C configuration register offset 3462306a36Sopenharmony_ci * @i2c_cfg_clear_mask: high-speed mode bit clear mask in I2C config register 3562306a36Sopenharmony_ci * @i2c_cfg_hsen_mask: high-speed mode bit field mask in I2C config register 3662306a36Sopenharmony_ci * @i2c_mcode_mask: MCODE field mask for I2C config register 3762306a36Sopenharmony_ci * 3862306a36Sopenharmony_ci * XXX One of cmd_on_mask and cmd_on_shift are not needed 3962306a36Sopenharmony_ci * XXX VALID should probably be a shift, not a mask 4062306a36Sopenharmony_ci */ 4162306a36Sopenharmony_cistruct omap_vc_common { 4262306a36Sopenharmony_ci u32 cmd_on_mask; 4362306a36Sopenharmony_ci u32 valid; 4462306a36Sopenharmony_ci u8 bypass_val_reg; 4562306a36Sopenharmony_ci u8 data_shift; 4662306a36Sopenharmony_ci u8 slaveaddr_shift; 4762306a36Sopenharmony_ci u8 regaddr_shift; 4862306a36Sopenharmony_ci u8 cmd_on_shift; 4962306a36Sopenharmony_ci u8 cmd_onlp_shift; 5062306a36Sopenharmony_ci u8 cmd_ret_shift; 5162306a36Sopenharmony_ci u8 cmd_off_shift; 5262306a36Sopenharmony_ci u8 i2c_cfg_reg; 5362306a36Sopenharmony_ci u8 i2c_cfg_clear_mask; 5462306a36Sopenharmony_ci u8 i2c_cfg_hsen_mask; 5562306a36Sopenharmony_ci u8 i2c_mcode_mask; 5662306a36Sopenharmony_ci}; 5762306a36Sopenharmony_ci 5862306a36Sopenharmony_ci/* omap_vc_channel.flags values */ 5962306a36Sopenharmony_ci#define OMAP_VC_CHANNEL_DEFAULT BIT(0) 6062306a36Sopenharmony_ci#define OMAP_VC_CHANNEL_CFG_MUTANT BIT(1) 6162306a36Sopenharmony_ci 6262306a36Sopenharmony_ci/** 6362306a36Sopenharmony_ci * struct omap_vc_channel - VC per-instance data 6462306a36Sopenharmony_ci * @i2c_slave_addr: I2C slave address of PMIC for this VC channel 6562306a36Sopenharmony_ci * @volt_reg_addr: voltage configuration register address 6662306a36Sopenharmony_ci * @cmd_reg_addr: command configuration register address 6762306a36Sopenharmony_ci * @setup_time: setup time (in sys_clk cycles) of regulator for this channel 6862306a36Sopenharmony_ci * @cfg_channel: current value of VC channel configuration register 6962306a36Sopenharmony_ci * @i2c_high_speed: whether or not to use I2C high-speed mode 7062306a36Sopenharmony_ci * 7162306a36Sopenharmony_ci * @common: pointer to VC common data for this platform 7262306a36Sopenharmony_ci * @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA register 7362306a36Sopenharmony_ci * @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register 7462306a36Sopenharmony_ci * @smps_cmdra_mask: CMDRA* bitmask in the PRM_VC_CMD_RA register 7562306a36Sopenharmony_ci * @cmdval_reg: register for on/ret/off voltage level values for this channel 7662306a36Sopenharmony_ci * @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start 7762306a36Sopenharmony_ci * @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start 7862306a36Sopenharmony_ci * @smps_cmdra_reg: Offset of PRM_VC_SMPS_CMD_RA reg from PRM start 7962306a36Sopenharmony_ci * @cfg_channel_reg: VC channel configuration register 8062306a36Sopenharmony_ci * @cfg_channel_sa_shift: bit shift for slave address cfg_channel register 8162306a36Sopenharmony_ci * @flags: VC channel-specific flags (optional) 8262306a36Sopenharmony_ci */ 8362306a36Sopenharmony_cistruct omap_vc_channel { 8462306a36Sopenharmony_ci /* channel state */ 8562306a36Sopenharmony_ci u16 i2c_slave_addr; 8662306a36Sopenharmony_ci u16 volt_reg_addr; 8762306a36Sopenharmony_ci u16 cmd_reg_addr; 8862306a36Sopenharmony_ci u8 cfg_channel; 8962306a36Sopenharmony_ci bool i2c_high_speed; 9062306a36Sopenharmony_ci 9162306a36Sopenharmony_ci /* register access data */ 9262306a36Sopenharmony_ci const struct omap_vc_common *common; 9362306a36Sopenharmony_ci u32 smps_sa_mask; 9462306a36Sopenharmony_ci u32 smps_volra_mask; 9562306a36Sopenharmony_ci u32 smps_cmdra_mask; 9662306a36Sopenharmony_ci u8 cmdval_reg; 9762306a36Sopenharmony_ci u8 smps_sa_reg; 9862306a36Sopenharmony_ci u8 smps_volra_reg; 9962306a36Sopenharmony_ci u8 smps_cmdra_reg; 10062306a36Sopenharmony_ci u8 cfg_channel_reg; 10162306a36Sopenharmony_ci u8 cfg_channel_sa_shift; 10262306a36Sopenharmony_ci u8 flags; 10362306a36Sopenharmony_ci}; 10462306a36Sopenharmony_ci 10562306a36Sopenharmony_ciextern struct omap_vc_channel omap3_vc_mpu; 10662306a36Sopenharmony_ciextern struct omap_vc_channel omap3_vc_core; 10762306a36Sopenharmony_ci 10862306a36Sopenharmony_ciextern struct omap_vc_channel omap4_vc_mpu; 10962306a36Sopenharmony_ciextern struct omap_vc_channel omap4_vc_iva; 11062306a36Sopenharmony_ciextern struct omap_vc_channel omap4_vc_core; 11162306a36Sopenharmony_ci 11262306a36Sopenharmony_ciextern struct omap_vc_param omap3_mpu_vc_data; 11362306a36Sopenharmony_ciextern struct omap_vc_param omap3_core_vc_data; 11462306a36Sopenharmony_ci 11562306a36Sopenharmony_ciextern struct omap_vc_param omap4_mpu_vc_data; 11662306a36Sopenharmony_ciextern struct omap_vc_param omap4_iva_vc_data; 11762306a36Sopenharmony_ciextern struct omap_vc_param omap4_core_vc_data; 11862306a36Sopenharmony_ci 11962306a36Sopenharmony_civoid omap3_vc_set_pmic_signaling(int core_next_state); 12062306a36Sopenharmony_civoid omap4_vc_set_pmic_signaling(int core_next_state); 12162306a36Sopenharmony_ci 12262306a36Sopenharmony_civoid omap_vc_init_channel(struct voltagedomain *voltdm); 12362306a36Sopenharmony_ciint omap_vc_pre_scale(struct voltagedomain *voltdm, 12462306a36Sopenharmony_ci unsigned long target_volt, 12562306a36Sopenharmony_ci u8 *target_vsel, u8 *current_vsel); 12662306a36Sopenharmony_civoid omap_vc_post_scale(struct voltagedomain *voltdm, 12762306a36Sopenharmony_ci unsigned long target_volt, 12862306a36Sopenharmony_ci u8 target_vsel, u8 current_vsel); 12962306a36Sopenharmony_ciint omap_vc_bypass_scale(struct voltagedomain *voltdm, 13062306a36Sopenharmony_ci unsigned long target_volt); 13162306a36Sopenharmony_ci 13262306a36Sopenharmony_ci#endif 13362306a36Sopenharmony_ci 134