162306a36Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only 262306a36Sopenharmony_ci/* 362306a36Sopenharmony_ci * OMAP16xx specific gpio init 462306a36Sopenharmony_ci * 562306a36Sopenharmony_ci * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/ 662306a36Sopenharmony_ci * 762306a36Sopenharmony_ci * Author: 862306a36Sopenharmony_ci * Charulatha V <charu@ti.com> 962306a36Sopenharmony_ci */ 1062306a36Sopenharmony_ci 1162306a36Sopenharmony_ci#include <linux/platform_data/gpio-omap.h> 1262306a36Sopenharmony_ci#include <linux/soc/ti/omap1-io.h> 1362306a36Sopenharmony_ci 1462306a36Sopenharmony_ci#include "hardware.h" 1562306a36Sopenharmony_ci#include "irqs.h" 1662306a36Sopenharmony_ci#include "soc.h" 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ci#define OMAP1610_GPIO1_BASE 0xfffbe400 1962306a36Sopenharmony_ci#define OMAP1610_GPIO2_BASE 0xfffbec00 2062306a36Sopenharmony_ci#define OMAP1610_GPIO3_BASE 0xfffbb400 2162306a36Sopenharmony_ci#define OMAP1610_GPIO4_BASE 0xfffbbc00 2262306a36Sopenharmony_ci#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_ci/* smart idle, enable wakeup */ 2562306a36Sopenharmony_ci#define SYSCONFIG_WORD 0x14 2662306a36Sopenharmony_ci 2762306a36Sopenharmony_ci/* mpu gpio */ 2862306a36Sopenharmony_cistatic struct resource omap16xx_mpu_gpio_resources[] = { 2962306a36Sopenharmony_ci { 3062306a36Sopenharmony_ci .start = OMAP1_MPUIO_VBASE, 3162306a36Sopenharmony_ci .end = OMAP1_MPUIO_VBASE + SZ_2K - 1, 3262306a36Sopenharmony_ci .flags = IORESOURCE_MEM, 3362306a36Sopenharmony_ci }, 3462306a36Sopenharmony_ci { 3562306a36Sopenharmony_ci .start = INT_MPUIO, 3662306a36Sopenharmony_ci .flags = IORESOURCE_IRQ, 3762306a36Sopenharmony_ci }, 3862306a36Sopenharmony_ci}; 3962306a36Sopenharmony_ci 4062306a36Sopenharmony_cistatic struct omap_gpio_reg_offs omap16xx_mpuio_regs = { 4162306a36Sopenharmony_ci .revision = USHRT_MAX, 4262306a36Sopenharmony_ci .direction = OMAP_MPUIO_IO_CNTL, 4362306a36Sopenharmony_ci .datain = OMAP_MPUIO_INPUT_LATCH, 4462306a36Sopenharmony_ci .dataout = OMAP_MPUIO_OUTPUT, 4562306a36Sopenharmony_ci .irqstatus = OMAP_MPUIO_GPIO_INT, 4662306a36Sopenharmony_ci .irqenable = OMAP_MPUIO_GPIO_MASKIT, 4762306a36Sopenharmony_ci .irqenable_inv = true, 4862306a36Sopenharmony_ci .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE, 4962306a36Sopenharmony_ci}; 5062306a36Sopenharmony_ci 5162306a36Sopenharmony_cistatic struct omap_gpio_platform_data omap16xx_mpu_gpio_config = { 5262306a36Sopenharmony_ci .is_mpuio = true, 5362306a36Sopenharmony_ci .bank_width = 16, 5462306a36Sopenharmony_ci .bank_stride = 1, 5562306a36Sopenharmony_ci .regs = &omap16xx_mpuio_regs, 5662306a36Sopenharmony_ci}; 5762306a36Sopenharmony_ci 5862306a36Sopenharmony_cistatic struct platform_device omap16xx_mpu_gpio = { 5962306a36Sopenharmony_ci .name = "omap_gpio", 6062306a36Sopenharmony_ci .id = 0, 6162306a36Sopenharmony_ci .dev = { 6262306a36Sopenharmony_ci .platform_data = &omap16xx_mpu_gpio_config, 6362306a36Sopenharmony_ci }, 6462306a36Sopenharmony_ci .num_resources = ARRAY_SIZE(omap16xx_mpu_gpio_resources), 6562306a36Sopenharmony_ci .resource = omap16xx_mpu_gpio_resources, 6662306a36Sopenharmony_ci}; 6762306a36Sopenharmony_ci 6862306a36Sopenharmony_ci/* gpio1 */ 6962306a36Sopenharmony_cistatic struct resource omap16xx_gpio1_resources[] = { 7062306a36Sopenharmony_ci { 7162306a36Sopenharmony_ci .start = OMAP1610_GPIO1_BASE, 7262306a36Sopenharmony_ci .end = OMAP1610_GPIO1_BASE + SZ_2K - 1, 7362306a36Sopenharmony_ci .flags = IORESOURCE_MEM, 7462306a36Sopenharmony_ci }, 7562306a36Sopenharmony_ci { 7662306a36Sopenharmony_ci .start = INT_GPIO_BANK1, 7762306a36Sopenharmony_ci .flags = IORESOURCE_IRQ, 7862306a36Sopenharmony_ci }, 7962306a36Sopenharmony_ci}; 8062306a36Sopenharmony_ci 8162306a36Sopenharmony_cistatic struct omap_gpio_reg_offs omap16xx_gpio_regs = { 8262306a36Sopenharmony_ci .revision = OMAP1610_GPIO_REVISION, 8362306a36Sopenharmony_ci .direction = OMAP1610_GPIO_DIRECTION, 8462306a36Sopenharmony_ci .set_dataout = OMAP1610_GPIO_SET_DATAOUT, 8562306a36Sopenharmony_ci .clr_dataout = OMAP1610_GPIO_CLEAR_DATAOUT, 8662306a36Sopenharmony_ci .datain = OMAP1610_GPIO_DATAIN, 8762306a36Sopenharmony_ci .dataout = OMAP1610_GPIO_DATAOUT, 8862306a36Sopenharmony_ci .irqstatus = OMAP1610_GPIO_IRQSTATUS1, 8962306a36Sopenharmony_ci .irqenable = OMAP1610_GPIO_IRQENABLE1, 9062306a36Sopenharmony_ci .set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1, 9162306a36Sopenharmony_ci .clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1, 9262306a36Sopenharmony_ci .wkup_en = OMAP1610_GPIO_WAKEUPENABLE, 9362306a36Sopenharmony_ci .edgectrl1 = OMAP1610_GPIO_EDGE_CTRL1, 9462306a36Sopenharmony_ci .edgectrl2 = OMAP1610_GPIO_EDGE_CTRL2, 9562306a36Sopenharmony_ci}; 9662306a36Sopenharmony_ci 9762306a36Sopenharmony_cistatic struct omap_gpio_platform_data omap16xx_gpio1_config = { 9862306a36Sopenharmony_ci .bank_width = 16, 9962306a36Sopenharmony_ci .regs = &omap16xx_gpio_regs, 10062306a36Sopenharmony_ci}; 10162306a36Sopenharmony_ci 10262306a36Sopenharmony_cistatic struct platform_device omap16xx_gpio1 = { 10362306a36Sopenharmony_ci .name = "omap_gpio", 10462306a36Sopenharmony_ci .id = 1, 10562306a36Sopenharmony_ci .dev = { 10662306a36Sopenharmony_ci .platform_data = &omap16xx_gpio1_config, 10762306a36Sopenharmony_ci }, 10862306a36Sopenharmony_ci .num_resources = ARRAY_SIZE(omap16xx_gpio1_resources), 10962306a36Sopenharmony_ci .resource = omap16xx_gpio1_resources, 11062306a36Sopenharmony_ci}; 11162306a36Sopenharmony_ci 11262306a36Sopenharmony_ci/* gpio2 */ 11362306a36Sopenharmony_cistatic struct resource omap16xx_gpio2_resources[] = { 11462306a36Sopenharmony_ci { 11562306a36Sopenharmony_ci .start = OMAP1610_GPIO2_BASE, 11662306a36Sopenharmony_ci .end = OMAP1610_GPIO2_BASE + SZ_2K - 1, 11762306a36Sopenharmony_ci .flags = IORESOURCE_MEM, 11862306a36Sopenharmony_ci }, 11962306a36Sopenharmony_ci { 12062306a36Sopenharmony_ci .start = INT_1610_GPIO_BANK2, 12162306a36Sopenharmony_ci .flags = IORESOURCE_IRQ, 12262306a36Sopenharmony_ci }, 12362306a36Sopenharmony_ci}; 12462306a36Sopenharmony_ci 12562306a36Sopenharmony_cistatic struct omap_gpio_platform_data omap16xx_gpio2_config = { 12662306a36Sopenharmony_ci .bank_width = 16, 12762306a36Sopenharmony_ci .regs = &omap16xx_gpio_regs, 12862306a36Sopenharmony_ci}; 12962306a36Sopenharmony_ci 13062306a36Sopenharmony_cistatic struct platform_device omap16xx_gpio2 = { 13162306a36Sopenharmony_ci .name = "omap_gpio", 13262306a36Sopenharmony_ci .id = 2, 13362306a36Sopenharmony_ci .dev = { 13462306a36Sopenharmony_ci .platform_data = &omap16xx_gpio2_config, 13562306a36Sopenharmony_ci }, 13662306a36Sopenharmony_ci .num_resources = ARRAY_SIZE(omap16xx_gpio2_resources), 13762306a36Sopenharmony_ci .resource = omap16xx_gpio2_resources, 13862306a36Sopenharmony_ci}; 13962306a36Sopenharmony_ci 14062306a36Sopenharmony_ci/* gpio3 */ 14162306a36Sopenharmony_cistatic struct resource omap16xx_gpio3_resources[] = { 14262306a36Sopenharmony_ci { 14362306a36Sopenharmony_ci .start = OMAP1610_GPIO3_BASE, 14462306a36Sopenharmony_ci .end = OMAP1610_GPIO3_BASE + SZ_2K - 1, 14562306a36Sopenharmony_ci .flags = IORESOURCE_MEM, 14662306a36Sopenharmony_ci }, 14762306a36Sopenharmony_ci { 14862306a36Sopenharmony_ci .start = INT_1610_GPIO_BANK3, 14962306a36Sopenharmony_ci .flags = IORESOURCE_IRQ, 15062306a36Sopenharmony_ci }, 15162306a36Sopenharmony_ci}; 15262306a36Sopenharmony_ci 15362306a36Sopenharmony_cistatic struct omap_gpio_platform_data omap16xx_gpio3_config = { 15462306a36Sopenharmony_ci .bank_width = 16, 15562306a36Sopenharmony_ci .regs = &omap16xx_gpio_regs, 15662306a36Sopenharmony_ci}; 15762306a36Sopenharmony_ci 15862306a36Sopenharmony_cistatic struct platform_device omap16xx_gpio3 = { 15962306a36Sopenharmony_ci .name = "omap_gpio", 16062306a36Sopenharmony_ci .id = 3, 16162306a36Sopenharmony_ci .dev = { 16262306a36Sopenharmony_ci .platform_data = &omap16xx_gpio3_config, 16362306a36Sopenharmony_ci }, 16462306a36Sopenharmony_ci .num_resources = ARRAY_SIZE(omap16xx_gpio3_resources), 16562306a36Sopenharmony_ci .resource = omap16xx_gpio3_resources, 16662306a36Sopenharmony_ci}; 16762306a36Sopenharmony_ci 16862306a36Sopenharmony_ci/* gpio4 */ 16962306a36Sopenharmony_cistatic struct resource omap16xx_gpio4_resources[] = { 17062306a36Sopenharmony_ci { 17162306a36Sopenharmony_ci .start = OMAP1610_GPIO4_BASE, 17262306a36Sopenharmony_ci .end = OMAP1610_GPIO4_BASE + SZ_2K - 1, 17362306a36Sopenharmony_ci .flags = IORESOURCE_MEM, 17462306a36Sopenharmony_ci }, 17562306a36Sopenharmony_ci { 17662306a36Sopenharmony_ci .start = INT_1610_GPIO_BANK4, 17762306a36Sopenharmony_ci .flags = IORESOURCE_IRQ, 17862306a36Sopenharmony_ci }, 17962306a36Sopenharmony_ci}; 18062306a36Sopenharmony_ci 18162306a36Sopenharmony_cistatic struct omap_gpio_platform_data omap16xx_gpio4_config = { 18262306a36Sopenharmony_ci .bank_width = 16, 18362306a36Sopenharmony_ci .regs = &omap16xx_gpio_regs, 18462306a36Sopenharmony_ci}; 18562306a36Sopenharmony_ci 18662306a36Sopenharmony_cistatic struct platform_device omap16xx_gpio4 = { 18762306a36Sopenharmony_ci .name = "omap_gpio", 18862306a36Sopenharmony_ci .id = 4, 18962306a36Sopenharmony_ci .dev = { 19062306a36Sopenharmony_ci .platform_data = &omap16xx_gpio4_config, 19162306a36Sopenharmony_ci }, 19262306a36Sopenharmony_ci .num_resources = ARRAY_SIZE(omap16xx_gpio4_resources), 19362306a36Sopenharmony_ci .resource = omap16xx_gpio4_resources, 19462306a36Sopenharmony_ci}; 19562306a36Sopenharmony_ci 19662306a36Sopenharmony_cistatic struct platform_device *omap16xx_gpio_dev[] __initdata = { 19762306a36Sopenharmony_ci &omap16xx_mpu_gpio, 19862306a36Sopenharmony_ci &omap16xx_gpio1, 19962306a36Sopenharmony_ci &omap16xx_gpio2, 20062306a36Sopenharmony_ci &omap16xx_gpio3, 20162306a36Sopenharmony_ci &omap16xx_gpio4, 20262306a36Sopenharmony_ci}; 20362306a36Sopenharmony_ci 20462306a36Sopenharmony_ci/* 20562306a36Sopenharmony_ci * omap16xx_gpio_init needs to be done before 20662306a36Sopenharmony_ci * machine_init functions access gpio APIs. 20762306a36Sopenharmony_ci * Hence omap16xx_gpio_init is a postcore_initcall. 20862306a36Sopenharmony_ci */ 20962306a36Sopenharmony_cistatic int __init omap16xx_gpio_init(void) 21062306a36Sopenharmony_ci{ 21162306a36Sopenharmony_ci int i; 21262306a36Sopenharmony_ci void __iomem *base; 21362306a36Sopenharmony_ci struct resource *res; 21462306a36Sopenharmony_ci struct platform_device *pdev; 21562306a36Sopenharmony_ci struct omap_gpio_platform_data *pdata; 21662306a36Sopenharmony_ci 21762306a36Sopenharmony_ci if (!cpu_is_omap16xx()) 21862306a36Sopenharmony_ci return -EINVAL; 21962306a36Sopenharmony_ci 22062306a36Sopenharmony_ci /* 22162306a36Sopenharmony_ci * Enable system clock for GPIO module. 22262306a36Sopenharmony_ci * The CAM_CLK_CTRL *is* really the right place. 22362306a36Sopenharmony_ci */ 22462306a36Sopenharmony_ci omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04, 22562306a36Sopenharmony_ci ULPD_CAM_CLK_CTRL); 22662306a36Sopenharmony_ci 22762306a36Sopenharmony_ci for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++) { 22862306a36Sopenharmony_ci pdev = omap16xx_gpio_dev[i]; 22962306a36Sopenharmony_ci pdata = pdev->dev.platform_data; 23062306a36Sopenharmony_ci 23162306a36Sopenharmony_ci res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 23262306a36Sopenharmony_ci if (unlikely(!res)) { 23362306a36Sopenharmony_ci dev_err(&pdev->dev, "Invalid mem resource.\n"); 23462306a36Sopenharmony_ci return -ENODEV; 23562306a36Sopenharmony_ci } 23662306a36Sopenharmony_ci 23762306a36Sopenharmony_ci base = ioremap(res->start, resource_size(res)); 23862306a36Sopenharmony_ci if (unlikely(!base)) { 23962306a36Sopenharmony_ci dev_err(&pdev->dev, "ioremap failed.\n"); 24062306a36Sopenharmony_ci return -ENOMEM; 24162306a36Sopenharmony_ci } 24262306a36Sopenharmony_ci 24362306a36Sopenharmony_ci __raw_writel(SYSCONFIG_WORD, base + OMAP1610_GPIO_SYSCONFIG); 24462306a36Sopenharmony_ci iounmap(base); 24562306a36Sopenharmony_ci 24662306a36Sopenharmony_ci platform_device_register(omap16xx_gpio_dev[i]); 24762306a36Sopenharmony_ci } 24862306a36Sopenharmony_ci 24962306a36Sopenharmony_ci return 0; 25062306a36Sopenharmony_ci} 25162306a36Sopenharmony_cipostcore_initcall(omap16xx_gpio_init); 252